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GTU Basic Electronics (3110016) Semester 1 & 2 Summer 2025 Solved Paper

Complete, student-friendly worked solutions for Gujarat Technological University (GTU) Basic Electronics (3110016) Semester 1 & 2 Summer 2025 examination paper.

Introduction

This paper contains comprehensive, step-by-step solutions for the GTU Basic Electronics (3110016) Summer 2025 examination. Each answer is prepared to meet GTU marking schemes, featuring labeled schematic diagrams, derivations, complete calculations, and detailed comparisons.

Paper Information

University
Gujarat Technological University
Department
First Year Engineering (Common)
Semester
Semester 1 & 2
Subject
Basic Electronics
Subject Code
3110016
Exam
Summer 2025
Year
2025

Questions and Solutions

Q.1 (a)

Question

Draw and explain constructional details and symbols for BJT.

Solution

Bipolar Junction Transistor (BJT)

A Bipolar Junction Transistor (BJT) is a three-terminal, two-junction semiconductor device whose operation depends on both charge carriers: electrons and holes. It is primarily used for signal amplification and electrical switching.

Constructional Details

A BJT consists of three distinct semiconductor regions:

  1. Emitter (E): Heavily doped to inject a large number of charge carriers (electrons in NPN, holes in PNP) into the base region. It has a moderate physical size.
  2. Base (B): Located in the center between the emitter and collector. It is very lightly doped and extremely thin (a few micrometers) so that most injected carriers pass straight across to the collector with negligible recombination.
  3. Collector (C): Moderately doped and physically the largest region among the three, designed to collect injected carriers and dissipate the heat generated during transistor operation.

BJTs are classified into two types:

  • NPN Transistor: A thin P-type layer sandwiched between two N-type layers.
  • PNP Transistor: A thin N-type layer sandwiched between two P-type layers.

Circuit Symbols and Internal Structure

   NPN Transistor Structure                  PNP Transistor Structure
   +---------+-------+---------+             +---------+-------+---------+
   |    N    |   P   |    N    |             |    P    |   N   |    P    |
   | Emitter | Base  |Collector|             | Emitter | Base  |Collector|
   +---------+-------+---------+             +---------+-------+---------+
        |        |        |                       |        |        |
        E        B        C                       E        B        C

   NPN Schematic Symbol                      PNP Schematic Symbol
            C                                         C
            |                                         |
            |/                                        |/
      B ----|                           B ----| 
            |\                                        |\ 
            | \                                       | \ (arrow inward)
            v  \ (arrow outward)                      |  \
            E                                         E

(Schematic, not to scale)

  • The arrow on the emitter terminal always points in the direction of conventional current flow when the base-emitter junction is forward-biased.
  • In an NPN, the arrow points outward from Base to Emitter.
  • In a PNP, the arrow points inward from Emitter to Base.

Q.1 (b)

Question

Draw and explain the V/I characteristics of a practical diode.

Solution

V/I Characteristics of a Practical Diode

The V/I characteristic curve of a PN junction diode shows the variation of current (I) flowing through the diode as a function of the external voltage (V) applied across its terminals.

                      Current I (mA)
                            ^
                            |           / Forward Conduction
                            |          / 
                            |         /  
                            |        /   
    Reverse Breakdown       |       /    
   ---------+               |      /     
            |               |     /      
   <--------+---------------+----+------------> Forward Voltage VF (V)
   VR (V)   |       O       |   VK (Cut-in voltage: 0.7V for Si, 0.3V for Ge)
            |  Reverse      |
            |  Saturation   |
            |  Current (IS) |
            v               |
                      Current I (uA)

(Schematic, not to scale)

1. Forward-Bias Region

  • When the P-terminal is connected to the positive terminal of a voltage supply and the N-terminal to the negative terminal, the diode is forward-biased.
  • Cut-in / Knee Voltage (VK): Initially, when the applied voltage is less than the barrier potential (approximately 0.7 V for Silicon and 0.3 V for Germanium), the diode conducts very negligible current.
  • Once the applied forward voltage exceeds VK, the depletion region narrows significantly, and forward current increases exponentially following Shockley's diode equation:
    I = IS [e^(V / (eta VT)) - 1]
    where IS is reverse saturation current, VT is thermal voltage (around 26 mV at 300 K), and eta is the ideality factor.

2. Reverse-Bias Region

  • When the P-terminal is connected to the negative terminal and the N-terminal to the positive terminal, the diode is reverse-biased.
  • The depletion region widens, preventing majority carriers from crossing the junction.
  • A very small, constant current called the reverse saturation current (IS) flows due to thermally generated minority carriers (in microamperes for Germanium and nanoamperes for Silicon).

3. Reverse Breakdown Region

  • If the applied reverse voltage is increased beyond a critical limit known as the Breakdown Voltage (VBR), the covalent bonds break rapidly, causing an avalanche or Zener breakdown.
  • The reverse current rises sharply, which can destroy a standard practical diode if not limited by an external resistor.

Q.1 (c)

Question

Draw Common Base configuration and discuss its input and output characteristics with ICBO, ri, ro, and current gain α.

Solution

Common Base (CB) Configuration

In a Common Base configuration, the base terminal is connected common to both the input and output circuits. The emitter-base junction forms the input port, and the collector-base junction forms the output port.

         IE              IC
   E <-------+        +-------> C
             |        |
           +---+    +---+
      VEE ( - )    ( - ) VCC
           ( + )    ( + )
             |        |
   ----------+--------+----------
                 |   B (Common)
                --- Ground

(Schematic, not to scale: NPN Transistor in CB Mode)

---

1. Input Characteristics

  • Definition: The curve plotted between input current (IE) and input voltage (VEB) keeping output voltage (VCB) constant.
  • Behavior: The emitter-base junction acts like a standard forward-biased diode. Below the cut-in voltage (0.7 V for Si), emitter current is negligible. Beyond this voltage, IE increases rapidly.
  • Effect of VCB (Early Effect): When VCB is increased, the effective width of the base region decreases. This allows more carriers from the emitter to be swept across the collector, causing IE to increase slightly for the same value of VEB.
  • Dynamic Input Resistance (ri):
    ri = Delta VEB / Delta IE | (with VCB = constant)
    Typically, ri is very low, on the order of 20 Ohm to 100 Ohm.

---

2. Output Characteristics

  • Definition: The curve plotted between output current (IC) and output voltage (VCB) keeping input current (IE) constant.
  • The characteristic has three operating regions:
  1. Active Region (Emitter forward-biased, Collector reverse-biased): IC is almost entirely determined by IE and is virtually independent of VCB. IC is slightly less than IE.
  2. Cut-off Region (Both junctions reverse-biased): When IE = 0, a tiny leakage current flows, denoted as ICBO.
  3. Saturation Region (Both junctions forward-biased): VCB becomes slightly negative, and IC drops steeply to zero.
  • Dynamic Output Resistance (ro):
    ro = Delta VCB / Delta IC | (with IE = constant)
    Because the curves in the active region are almost horizontal (very small change in IC for large changes in VCB), ro is extremely high, typically 500 kOhm to 2 MOhm.

---

3. Leakage Current (ICBO)

  • ICBO (Collector-to-Base Leakage Current with Emitter Open): It is the minority carrier reverse current that flows through the reverse-biased collector-base junction when IE = 0.
  • It is highly temperature-dependent, roughly doubling for every 10 °C rise in temperature.

---

4. Current Gain (alpha)

  • DC Current Gain (alpha_dc): The ratio of collector current to emitter current:
    alpha_dc = (IC - ICBO) / IE ~= IC / IE
  • AC Current Gain (alpha_ac):
    alpha_ac = Delta IC / Delta IE | (with VCB = constant)
  • Because almost all emitter carriers reach the collector except for a small base recombination fraction (1% to 5%), alpha is always slightly less than unity, typically ranging from 0.95 to 0.995.

Q.2 (a)

Question

Define: clipper, Clamper, PIV of a Diode.

Solution

1. Clipper (Clipping Circuit)

A clipper is a wave-shaping circuit designed to eliminate or cut off portions of an applied alternating input voltage waveform above or below a specified reference level, without distorting the remaining unclipped part of the waveform.

2. Clamper (Clamping Circuit)

A clamper (also called a DC restorer) is a circuit composed of a diode, a capacitor, and a resistor that shifts an AC signal entirely above or below a chosen DC reference level without altering the peak-to-peak amplitude or overall waveshape of the original signal.

3. Peak Inverse Voltage (PIV) of a Diode

Peak Inverse Voltage (PIV) is the maximum reverse-bias voltage that a diode can safely withstand across its terminals during the non-conducting half-cycle without undergoing junction breakdown or permanent damage.

Q.2 (b)

Question

Compare different rectifier circuits.

Solution

Comparison of Rectifier Circuits

| Parameter | Half-Wave Rectifier (HWR) | Full-Wave Center-Tapped Rectifier | Full-Wave Bridge Rectifier | | :--- | :--- | :--- | :--- | | Number of Diodes | 1 | 2 | 4 | | Center-Tapped Transformer Required? | No (Optional) | Yes (Mandatory) | No (Standard step-down can be used) | | DC Output Voltage (Vdc) | Vm / pi ~= 0.318 Vm | 2 Vm / pi ~= 0.636 Vm | 2 Vm / pi ~= 0.636 Vm | | RMS Output Voltage (Vrms) | Vm / 2 = 0.5 Vm | Vm / sqrt(2) ~= 0.707 Vm | Vm / sqrt(2) ~= 0.707 Vm | | Ripple Factor (gamma) | 1.21 | 0.482 | 0.482 | | Rectification Efficiency (eta) | 40.6% | 81.2% | 81.2% | | Peak Inverse Voltage (PIV) | Vm | 2 Vm | Vm | | Output Ripple Frequency | fin | 2 fin | 2 * fin | | Transformer Utilization Factor (TUF) | 0.287 | 0.693 | 0.812 | | Application | Low-cost, non-critical low-power devices | Medium-voltage analog equipment | Standard modern DC power supplies |

Q.2 (c)

Question

Discuss diode approximations.

Solution

Diode Approximations

In circuit analysis, a practical diode exhibits non-linear exponential characteristics. To simplify network calculations, engineers use three levels of diode approximations depending on the desired accuracy.

---

1. First Approximation: Ideal Diode Model

  • Concept: The diode is treated as a perfect electrical switch with zero turn-on voltage, zero forward resistance, and infinite reverse resistance.
  • Forward Bias (V >= 0): Operates as a closed switch (short circuit). Voltage drop across diode VD = 0 V.
  • Reverse Bias (V < 0): Operates as an open switch (open circuit). Current through diode ID = 0 A.
  • Application: Used for high-voltage circuits where forward drop is negligible compared to supply voltage.
   Ideal Diode Model:
   Forward Bias:   o---[ Short Circuit ]---o   (VD = 0 V)
   Reverse Bias:   o---[  Open Switch  ]---o   (ID = 0 A)

(Schematic, not to scale)

---

2. Second Approximation: Constant Voltage Drop Model

  • Concept: Takes into account the barrier potential (cut-in voltage VK) required to overcome the depletion layer (0.7 V for Silicon, 0.3 V for Germanium). Once turned on, it is assumed to have zero internal dynamic resistance.
  • Forward Bias (V >= VK): Replaced by a DC battery of voltage VK opposing forward current. VD = VK = 0.7 V (for Silicon).
  • Reverse Bias (V < VK): Operates as an open switch (ID = 0 A).
  • Application: The most commonly used model in everyday engineering circuit calculations.
   Second Approximation Model:
   Forward Bias:   o---[ + |i- 0.7V ]---o   (VD = 0.7 V)
   Reverse Bias:   o---[ Open Switch ]---o   (ID = 0 A)

(Schematic, not to scale)

---

3. Third Approximation: Piecewise Linear Model

  • Concept: Accounts for both the barrier potential (VK) and the internal bulk resistance (rB) of the semiconductor material.
  • Forward Bias (V >= VK): Replaced by a battery VK in series with a small dynamic bulk resistance rB.
    VD = VK + ID * rB
    The V/I curve has a finite upward slope equal to 1 / rB.
  • Reverse Bias (V < VK): Modeled with a very large reverse resistance (rR), permitting a tiny leakage current.
  • Application: Used in precise circuit designs and high-current applications where the internal resistance drop ID * rB is significant.
   Third Approximation Model:
   Forward Bias:   o---[ + |i- 0.7V ]---[/\[/\ rB ]---o

(Schematic, not to scale)

Summary

  • Ideal: Switch only.
  • 2nd Approximation: Switch + 0.7 V battery.
  • 3rd Approximation: Switch + 0.7 V battery + dynamic resistance rB.

Q.2 (c) OR

Question

Explain full wave center-tape rectifier in detail with waveforms and derivation of average output voltage.

Solution

Full-Wave Center-Tapped Rectifier

A center-tapped full-wave rectifier uses a center-tapped secondary transformer winding and two diodes to convert an alternating current (AC) input into unidirectional pulsating direct current (DC) during both half-cycles.

Circuit Diagram

          D1
   A ----|>|----+--------------------+
   |            |                    |
  ( )           |                    |
  ( ) Sec.      |                  +---+
  ( )           |                  |   |
   |            |                  | R |  Load
   C (Center) --+----------------- | L |  Resistor
   |            |                  |   |
  ( )           |                  +---+
  ( ) Sec.      |                    |
  ( )           |                    |
   |      D2    |                    |
   B ----|>|----+--------------------+

(Schematic, not to scale)

Working Principle

Let the secondary input voltage be vin = Vm sin(omega t).

  1. Positive Half-Cycle (0 to pi):
  • Terminal A is positive with respect to center tap C, and terminal B is negative.
  • Diode D1 is forward-biased and conducts current.
  • Diode D2 is reverse-biased and behaves as an open circuit.
  • Current flows through D1, downwards through load resistor RL, and returns to center tap C.
  1. Negative Half-Cycle (pi to 2*pi):
  • Terminal B is positive with respect to center tap C, and terminal A is negative.
  • Diode D2 is forward-biased and conducts current.
  • Diode D1 is reverse-biased.
  • Current flows through D2, downwards through load resistor RL, and returns to center tap C.
  • Because current flows in the same direction through RL during both halves of the AC cycle, a full-wave rectified DC voltage is established.

Waveforms

   Input Voltage (v):
        +Vm  _       _
            / \     / \
      ---0-/---\---/---\---> wt
                \_/     \_/
        -Vm

   Output Voltage across RL (vo):
        +Vm  _   _   _   _
            / \ / \ / \ / \
      ---0-+---+---+---+---> wt
           0   pi 2pi 3pi 4pi

(Schematic, not to scale)

---

Derivation of Average Output Voltage (Vdc or Vavg)

The output waveform is periodic with a time period T = pi radians. The instantaneous output voltage is given by: vo(wt) = Vm * sin(wt) for 0 <= wt <= pi

The average value is found by integrating over one period: Vdc = (1 / pi) Integral from 0 to pi of [Vm sin(wt)] d(wt)

Step-by-step evaluation: Vdc = (Vm / pi) [-cos(wt)] from 0 to pi Vdc = (Vm / pi) [ -cos(pi) - (-cos(0)) ] Since cos(pi) = -1 and cos(0) = 1: Vdc = (Vm / pi) [ -(-1) - (-1) ] Vdc = (Vm / pi) [ 1 + 1 ] Vdc = (2 Vm) / pi ~= 0.636 Vm

Similarly, the average load current is: Idc = Vdc / RL = (2 * Im) / pi

Q.3 (a)

Question

Draw circuit diagram of positive clamper and explain the operation.

Solution

Positive Clamper

A positive clamper is a circuit that adds a positive DC level to an incoming AC signal, shifting the entire input waveform upward such that the lowest negative peaks rest on the reference level (typically 0 V).

Circuit Diagram

          C
   o-----||-----+-----------------o + 
  +             |                 
                |                 
  vi            -  Diode D        vo
                ^  (points down)  
  -             |                 
   o------------+-----------------o - 
                |                 
                R  Load Resistor  
                |                 
   --------------------------------

(Schematic, not to scale)

Operation

  1. Negative Half-Cycle of Input:
  • As the input voltage vi goes negative, the cathode of diode D becomes negative relative to the anode, causing the diode to turn ON (forward-biased).
  • The diode acts like a short circuit, allowing capacitor C to charge rapidly to the peak input value Vm with the polarity: positive on the right plate, negative on the left plate.
  • The output voltage during this charging interval is pinned to the diode drop (approx. 0 V for an ideal diode).
  1. Positive Half-Cycle of Input:
  • As the input switches to positive, the diode becomes reverse-biased (OFF) because the cathode voltage is maintained positive by both the input and the charged capacitor.
  • The capacitor cannot discharge easily because the discharge time constant RC is made much greater than the signal time period T (RC >> T).
  • By applying Kirchhoff's Voltage Law (KVL) around the loop:
    vo = vi + Vc = vi + Vm
  • When vi = +Vm, the peak output voltage reaches vo = +Vm + Vm = +2 * Vm.
  • When vi = -Vm, vo = -Vm + Vm = 0 V.
  1. Result:
    The original AC signal waveform retains its shape and peak-to-peak amplitude (2 * Vm), but is entirely shifted vertically upward by +Vm.

Q.3 (b)

Question

Draw and explain circuit of AND gate using diodes.

Solution

Diode AND Gate

A 2-input AND gate produces a HIGH output (logic 1) if and only if all of its inputs are HIGH (logic 1). If any input is LOW (logic 0), the output is LOW.

Circuit Diagram

                   +Vcc (+5V)
                      |
                      [
                      ] R (Pull-up resistor)
                      [
                      |
   A o--------|<|-----+----------------o Output Y
               D1     |
   B o--------|<|-----+
               D2

(Schematic, not to scale)

Working Principle

Let standard logic levels be defined as: Logic 0 = 0 V (Ground) and Logic 1 = +5 V (= Vcc).

  1. Case 1: Both inputs LOW (A = 0 V, B = 0 V)
  • Both diodes D1 and D2 have their cathodes grounded, making them forward-biased by +Vcc.
  • Both diodes conduct and pull the output junction voltage down to the diode forward voltage drop (approx. 0.7 V for Silicon diodes or 0 V ideally).
  • Output Y = LOW (Logic 0).
  1. Case 2: Any one input LOW (A = 0 V, B = 5 V or A = 5 V, B = 0 V)
  • The diode connected to the 0 V input is forward-biased and conducts.
  • The diode connected to +5 V has zero or negative potential across it and remains reverse-biased (OFF).
  • The conducting diode pulls the output node down to approximately 0.7 V.
  • Output Y = LOW (Logic 0).
  1. Case 3: Both inputs HIGH (A = 5 V, B = 5 V)
  • The cathodes of both diodes are at +5 V. Since the anodes are tied through resistor R to +Vcc (+5 V), there is no forward potential difference across either diode.
  • Both D1 and D2 remain reverse-biased (OFF).
  • No current flows through pull-up resistor R, so there is no voltage drop across R.
  • The output node remains at +Vcc = +5 V.
  • Output Y = HIGH (Logic 1).

Truth Table

| Input A | Input B | Diode D1 | Diode D2 | Output Y | | :---: | :---: | :---: | :---: | :---: | | 0 V (0) | 0 V (0) | ON | ON | 0 V (0) | | 0 V (0) | 5 V (1) | ON | OFF | 0 V (0) | | 5 V (1) | 0 V (0) | OFF | ON | 0 V (0) | | 5 V (1) | 5 V (1) | OFF | OFF | 5 V (1) |

Q.3 (c)

Question

Explain thermal stability of BJT with stability factors S, S’, S’’.

Solution

Thermal Stability of BJT

In a Bipolar Junction Transistor, collector current IC is governed by: IC = beta IB + (1 + beta) ICBO

When the operating temperature of a transistor increases:

  1. Leakage Current (ICBO) increases significantly (roughly doubling for every 10 °C rise).
  2. Base-Emitter Voltage (VBE) decreases at an approximate rate of -2.5 mV/°C.
  3. Current Gain (beta) increases with temperature.

All three changes cause the collector current IC to increase. An increased IC causes greater power dissipation at the collector junction (PD = VCE * IC), which further heats up the junction. This cycle can spiral continuously, leading to thermal runaway, which can physically destroy the device. Thermal stability refers to the ability of a biasing circuit to keep the Q-point (operating point) stable despite temperature variations.

---

Stability Factors

Because IC is a function of three temperature-sensitive variables, IC = f(ICBO, VBE, beta), the total differential change in collector current is expressed as: Delta IC = S Delta ICBO + S' Delta VBE + S'' * Delta beta

1. Stability Factor S (Stability with respect to ICBO)

  • Definition: The rate of change of collector current IC with respect to reverse saturation current ICBO, keeping VBE and beta constant.
  • Formula:
    S = (partial IC / partial ICBO) | (VBE, beta = constant)
  • For an ideal thermally stable circuit, S should be as close to 1 as possible.
  • In an uncompensated fixed-bias circuit, S = 1 + beta (which is very large, e.g., 100, indicating poor stability). In a voltage-divider bias circuit, S can be designed close to 1.

2. Stability Factor S' (Stability with respect to VBE)

  • Definition: The rate of change of collector current IC with respect to base-emitter voltage VBE, keeping ICBO and beta constant.
  • Formula:
    S' = (partial IC / partial VBE) | (ICBO, beta = constant)
  • Since VBE decreases with increasing temperature, a smaller absolute value of S' guarantees that the downward shift in VBE produces minimal shift in the operating point.

3. Stability Factor S'' (Stability with respect to beta)

  • Definition: The rate of change of collector current IC with respect to current gain beta, keeping ICBO and VBE constant.
  • Formula:
    S'' = (partial IC / partial beta) | (ICBO, VBE = constant)
  • A low value of S'' ensures that unit-to-unit transistor parameter variations or temperature-induced changes in beta will not drastically alter the amplifier bias level.

Conclusion

To prevent thermal runaway and maintain high stability, an effective bias network (such as the voltage-divider bias with an emitter resistor RE) is used to minimize all three stability factors S, S', and S'' simultaneously.

Q.3 (a) OR

Question

Draw Hybrid equivalent model of transistor for CB, CE, CC configurations.

Solution

Hybrid (h-parameter) Equivalent Model of a BJT

The hybrid model represents a transistor as a two-port network combining voltage and current equations.

Generalized Two-Port Equations

v1 = hi * i1 + hr v2 i2 = h_f i1 + h_o * v2

Where:

  • h_i = Input impedance (Ohm)
  • h_r = Reverse voltage transfer ratio (unitless)
  • h_f = Forward current transfer ratio (unitless)
  • h_o = Output admittance (Siemens / Mho)

Generalized Equivalent Circuit

     i1 --->                                   i2 --->
   o-----+--------[ hi ]---------+--------+---------+-----o
         |                       |        |         |
         +           +           |       ( )        [
                     -          (^)      ( )        ] 1/ho
        v1         hr * v2      ( )       |         [
                     +           | hf*i1  |         |
         -           -           |        |         |
   o-----+-----------------------+--------+---------+-----o

(Schematic, not to scale)

---

1. Common Emitter (CE) Configuration

  • Input: Base (B), Output: Collector (C), Common: Emitter (E)
  • Parameters: hie, hre, hfe, hoe
     ib --->                                   ic --->
   B o------------[ hie ]--------+--------+---------+-----o C
                     +           |       ( )        |
                     -          (^)      ( )        ] 1/hoe
                  hre * vce     ( )       |         [
                     +           | hfe*ib |         |
   E o---------------------------+--------+---------+-----o E

(Schematic, not to scale)

---

2. Common Base (CB) Configuration

  • Input: Emitter (E), Output: Collector (C), Common: Base (B)
  • Parameters: hib, hrb, hfb, hob
     ie --->                                   ic --->
   E o------------[ hib ]--------+--------+---------+-----o C
                     +           |       ( )        |
                     -          (^)      ( )        ] 1/hob
                  hrb * vcb     ( )       |         [
                     +           | hfb*ie |         |
   B o---------------------------+--------+---------+-----o B

(Schematic, not to scale)

---

3. Common Collector (CC) Configuration

  • Input: Base (B), Output: Emitter (E), Common: Collector (C)
  • Parameters: hic, hrc, hfc, hoc
     ib --->                                   ie --->
   B o------------[ hic ]--------+--------+---------+-----o E
                     +           |       ( )        |
                     -          (^)      ( )        ] 1/hoc
                  hrc * vec     ( )       |         [
                     +           | hfc*ib |         |
   C o---------------------------+--------+---------+-----o C

(Schematic, not to scale)

Q.3 (b) OR

Question

Describe LED with its applications.

Solution

Light Emitting Diode (LED)

A Light Emitting Diode (LED) is a specially doped forward-biased PN junction semiconductor diode that emits incoherent, narrow-spectrum light via spontaneous electroluminescence.

Principle of Operation

  1. Forward Biasing: When external forward voltage is applied across the LED terminals, electrons from the N-type region and holes from the P-type region are pushed across the junction.
  2. Recombination: In the depletion region and neutral semiconductor bulk, conduction-band electrons recombine with valence-band holes.
  3. Photon Emission: During recombination, electrons fall from a higher energy level to a lower energy level. The released energy (Delta E = Eg) is emitted as a photon of light.
  • The emitted photon wavelength is given by: lambda = (h * c) / Eg, where h is Planck's constant, c is light speed, and Eg is the bandgap energy of the semiconductor.
  1. Materials Used: Direct bandgap semiconductors are used instead of Silicon or Germanium (which are indirect bandgap materials where energy is dissipated primarily as heat):
  • Gallium Arsenide (GaAs): Emits Infrared light.
  • Gallium Phosphide (GaP): Emits Red or Green light.
  • Gallium Arsenide Phosphide (GaAsP): Emits Red or Yellow light.
  • Indium Gallium Nitride (InGaN): Emits Blue or White light.

Schematic Symbol

          Anode       Cathode
            A ---|>|--- K
                  / \
                 /   \  (Photons emitted outwards)

(Schematic, not to scale)

Applications of LED

  1. Visual Indicators: Status indicator lights on consumer electronics, computers, and battery chargers.
  2. Digital Displays: Alphanumeric and seven-segment displays in digital clocks, measuring instruments, and meters.
  3. General Lighting: Highly efficient indoor/outdoor LED bulbs, street lamps, and automobile headlights.
  4. Optical Fiber Communications: Used as optical light sources for transmitting digital data over optical fibers.
  5. Optocouplers / Optoisolators: Used alongside phototransistors to provide electrical isolation between high-voltage and low-voltage circuits.

Q.3 (c) OR

Question

Discuss operation and applications of PIN Photo diode and Solar cell.

Solution

1. PIN Photodiode

A PIN Photodiode is a light-sensitive PN junction semiconductor device that includes an undoped, high-resistivity Intrinsic (I) semiconductor layer sandwiched between heavily doped P-type and N-type layers.

   P-layer       Intrinsic Layer (I)       N-layer
  +-------+-------------------------------+-------+
  |  P+   |         Depletion /           |  N+   |
  | Anode |       Intrinsic Region        |Cathode|
  +-------+-------------------------------+-------+
              |||| Light Photons (hf)
              vvvv

(Schematic, not to scale)

Principle of Operation
  • Biasing: The PIN photodiode is operated under reverse-bias conditions.
  • Wide Depletion Layer: Because the intrinsic layer is undoped, the reverse voltage creates a wide depletion region across the entire I-layer.
  • Photo Generation: When incident light photons with energy greater than the bandgap energy (hf >= Eg) strike the intrinsic region, they are absorbed, generating electron-hole pairs.
  • Current Transport: The high internal electric field across the intrinsic region rapidly sweeps electrons toward the N-region and holes toward the P-region before they can recombine.
  • This flow constitutes a reverse photocurrent directly proportional to the incident light intensity.
  • Advantages: The wide intrinsic region provides lower junction capacitance (enabling high-frequency switching and fast response time) and a larger light absorption volume.
Applications
  • High-speed optical fiber communications.
  • Laser pulse detection and optical receivers.
  • Barcode scanners and photographic light meters.

---

2. Solar Cell (Photovoltaic Cell)

A Solar Cell is an un-biased PN junction semiconductor device that converts solar/light energy directly into electrical energy through the photovoltaic effect.

          Photons (Sunlight)
              | | | |
              v v v v
      ====== Metal Fingers (Top Contact)
     ------------------------- Thin P-type layer
     ......................... PN Junction Depletion Region
     ========================= Thick N-type layer
     ------------------------- Back Metal Contact
                 |
                 v (Generates DC Voltage across Load RL)

(Schematic, not to scale)

Principle of Operation
  • A solar cell has a very thin surface layer so that light can easily reach and penetrate the PN junction.
  • Generation of Electron-Hole Pairs: Incoming photons with hf >= Eg strike the junction and excite electrons from the valence band to the conduction band.
  • Separation: The built-in electric field of the depletion region accelerates electrons toward the N-side and holes toward the P-side.
  • Voltage Development: Accumulation of these charges creates a potential difference across the terminals known as the open-circuit photo-voltage (Voc).
  • When an external load resistor (RL) is connected, current flows from the positive terminal through the load to the negative terminal without requiring any external bias battery.
Applications
  • Rooftop solar photovoltaic power panels.
  • Power sources for artificial satellites and space probes.
  • Solar-powered calculators, street lighting, and remote weather monitoring stations.

Q.4 (a)

Question

State the difference between Avalanche breakdown and Zener breakdown.

Solution

Difference between Avalanche and Zener Breakdown

| Parameter | Zener Breakdown | Avalanche Breakdown | | :--- | :--- | :--- | | Doping Concentration | Occurs in heavily doped PN junctions. | Occurs in lightly or moderately doped PN junctions. | | Depletion Layer Width | Extremely thin depletion layer (less than 10 nm). | Comparatively wide depletion layer. | | Operating Voltage | Occurs at low reverse voltages (typically < 6 V). | Occurs at higher reverse voltages (typically > 6 V). | | Breakdown Mechanism | Intense internal electric field directly pulls electrons out of covalent bonds (field emission). | High-velocity minority carriers collide with lattice atoms, knocking out further electrons (impact ionization). | | Temperature Coefficient | Negative temperature coefficient (breakdown voltage decreases as temperature rises). | Positive temperature coefficient (breakdown voltage increases as temperature rises). | | V/I Curve Sharpness | Very sharp and distinct breakdown knee. | Softer, less sharp breakdown knee. | | Reversibility | Completely reversible; junction returns to normal when voltage drops. | Reversible only if current is limited; can cause thermal breakdown if excessive. |

Q.4 (b)

Question

Discuss seven segment display with its types.

Solution

Seven-Segment Display

A seven-segment display is an electronic display device consisting of eight individual Light Emitting Diodes (seven linear segments labeled a through g arranged in a figure-8 pattern, plus an optional eighth decimal point segment dp). By illuminating specific combinations of segments, numerical digits from 0 to 9 and several letters can be displayed.

          --- a ---
         |         |
         f         b
         |         |
          --- g ---
         |         |
         e         c
         |         |
          --- d ---   (.) dp

(Schematic, not to scale)

Types of Seven-Segment Displays

Based on the internal wiring of diode terminals, seven-segment displays are manufactured in two basic configurations:

---

1. Common Anode (CA) Display

  • Construction: The anode terminals of all seven internal segment LEDs (plus dp) are tied together internally and connected to a common positive supply terminal (+Vcc).
  • Operation:
  • The common terminal is connected to +5 V.
  • To illuminate any given segment, its corresponding individual cathode terminal must be pulled LOW (Logic 0 / Ground) through a current-limiting resistor.
  • An active-LOW segment driver (such as IC 7447) is used.
   Common Anode:
          +Vcc
           |
     +-----+-----+
     |     |     |
    ---   ---   ---  (LEDs point downwards)
    \ /   \ /   \ / 
    ---   ---   --- 
     |     |     |
     a     b     c  ... (ground to light up)

(Schematic, not to scale)

---

2. Common Cathode (CC) Display

  • Construction: The cathode terminals of all seven segment LEDs (plus dp) are tied together internally and connected to a common ground point (0 V).
  • Operation:
  • The common terminal is connected to Ground (0 V).
  • To illuminate any given segment, its corresponding individual anode terminal must be driven HIGH (Logic 1 / +5 V) through a current-limiting resistor.
  • An active-HIGH segment driver (such as IC 7448) is used.
   Common Cathode:
     a     b     c  ... (supply +5V to light up)
     |     |     |
    ---   ---   --- 
    \ /   \ /   \ /  (LEDs point downwards to ground)
    ---   ---   --- 
     |     |     |
     +-----+-----+
           |
         Ground (0 V)

(Schematic, not to scale)

Q.4 (c)

Question

Explain biased positive and negative clipper circuits in detail.

Solution

Biased Clipper Circuits

A biased clipper uses an external DC reference voltage source (VB) in series with a diode to clip off an input signal above or below a chosen reference level other than zero volts.

---

1. Biased Positive Clipper

In a biased positive clipper, the portion of the alternating input waveform that exceeds a positive threshold voltage is clipped off.

Circuit Diagram (Shunt Type)
            R
   Vin o---[/\[/\]---+------------------o Vout
                     | 
                     -  Diode D
                     ^  (Cathode up)
                     | 
                    --- + VB (DC Bias Battery)
                   ----- - 
                     |
   ------------------+------------------o

(Schematic, not to scale)

Operation (Assuming Ideal Diode)
  1. When Vin < (VB + VD):
  • The anode of diode D is at potential VB, while the cathode is at Vin.
  • Since Vin is less than VB, the cathode is at a lower voltage than the anode? No: the cathode is connected to Vin and the anode is connected to +VB.
  • For Vin < VB, the cathode is at a lower potential than the anode, so the diode is forward-biased and conducts? Let us trace carefully:
  • In the schematic above: Anode is connected to battery positive terminal (+VB), cathode connected to the top node.
  • When Vin > VB, the cathode is higher than anode, so diode is OFF.
  • To clip above VB (biased positive clipper), the diode must conduct when Vin > VB. Therefore, the anode must be tied to the signal node and the cathode tied to the battery (+VB).
  • Correct standard orientation for biased positive clipper:
  • Anode to signal node, cathode to positive terminal of bias battery +VB.
  • When Vin < (VB + 0.7 V): Diode is reverse-biased (OFF). No current flows through R, hence Vout = Vin.
  • When Vin >= (VB + 0.7 V): Diode turns ON (conducts). The output node is clamped to Vout = VB + 0.7 V (or VB for ideal diode).
  • All positive signal portions exceeding (VB + 0.7 V) are clipped off.
   Input and Output Waveforms:
         Vin Waveform                  Vout Waveform
          +Vm  _                        Clipping Level: (VB + 0.7V)
              / \                              ----
             /   \                            /    \
      ------/-----\------> wt          ------/------\------> wt
           /       \                        /        \
          -Vm                               -Vm

(Schematic, not to scale)

---

2. Biased Negative Clipper

In a biased negative clipper, the circuit clips off any portion of the input voltage waveform that falls below a specified negative reference level.

Circuit Diagram (Shunt Type)
  • The diode is placed with its cathode tied to the signal node and its anode tied to the negative terminal (-VB) of the bias supply (or cathode to -VB and anode to node depending on reference polarity).
  • To clip below a negative voltage -VB:
  • Diode cathode is connected to the signal node; diode anode is connected to the negative terminal of battery (-VB).
  • When Vin > (-VB - 0.7 V): The cathode voltage is higher than the anode, so the diode is reverse-biased (OFF). Vout = Vin.
  • When Vin <= (-VB - 0.7 V): The cathode drops below the anode voltage, so the diode turns ON and conducts.
  • The output voltage is held at Vout = -VB - 0.7 V (or -VB for ideal diode).
  • All negative signal excursions below this level are clipped off cleanly.
   Input and Output Waveforms:
         Vin Waveform                  Vout Waveform
          +Vm  _                        +Vm  _
              / \                            / \
             /   \                          /   \
      ------/-----\------> wt          ----/-----\---------> wt
           /       \                        \___/ Clipping Level: (-VB - 0.7V)
          -Vm

(Schematic, not to scale)

Q.4 (a) OR

Question

For a BJT, αdc is 0.98 and base current is 50 μA, then find βdc , IC & IE.

Solution

1. Given Information

  • DC Current Gain: alpha_dc = 0.98
  • Base Current: IB = 50 uA = 50 * 10^(-6) A

2. What is Required

  • Common-Emitter DC Current Gain: beta_dc
  • Collector Current: IC
  • Emitter Current: IE

---

3. Step-by-Step Calculation

Step A: Calculate beta_dc

The relationship between alphadc and betadc is: betadc = alphadc / (1 - alpha_dc)

Substitute alphadc = 0.98: betadc = 0.98 / (1 - 0.98) betadc = 0.98 / 0.02 betadc = 49

---

Step B: Calculate Collector Current (IC)

Collector current in terms of betadc and base current (assuming negligible ICBO) is: IC = betadc * IB

Substitute the values: IC = 49 (50 10^(-6) A) IC = 2450 * 10^(-6) A IC = 2.45 mA (or 2450 uA)

---

Step C: Calculate Emitter Current (IE)

By Kirchhoff's Current Law for a BJT: IE = IB + IC

Substitute the known values: IE = 50 uA + 2450 uA IE = 2500 uA IE = 2.50 mA

Verification check: alpha_dc = IC / IE = 2.45 mA / 2.50 mA = 0.98 (Confirmed correct).

---

Final Answer

  • beta_dc = 49
  • IC = 2.45 mA
  • IE = 2.50 mA

Q.4 (b) OR

Question

Compare CB, CE, CC configurations.

Solution

Comparison of Transistor Configurations

| Characteristic Parameter | Common Base (CB) | Common Emitter (CE) | Common Collector (CC) | | :--- | :--- | :--- | :--- | | Common Terminal | Base | Emitter | Collector | | Input Terminal | Emitter | Base | Base | | Output Terminal | Collector | Collector | Emitter | | Input Resistance (Ri) | Very Low (20 Ohm to 100 Ohm) | Moderate (approx. 1 kOhm to 2 kOhm) | Very High (approx. 100 kOhm to 500 kOhm) | | Output Resistance (Ro) | Very High (approx. 1 MOhm) | Moderate (approx. 50 kOhm) | Very Low (approx. 50 Ohm to 1 kOhm) | | Voltage Gain (Av) | High (> 100) | High (> 100) | Less than unity (Av ~= 1) | | Current Gain (Ai) | Less than unity (alpha < 1) | High (beta ~= 50 to 300) | High (gamma = 1 + beta) | | Power Gain | Moderate | Very High (Highest) | Low to Moderate | | Phase Shift (Input to Output) | 0° (In-phase) | 180° (Out-of-phase) | 0° (In-phase) | | Primary Application | High-frequency RF amplifiers | Audio & general voltage amplification | Impedance matching & buffer stages |

Q.4 (c) OR

Question

Draw Emitter follower circuit and discuss its input and output characteristics.

Solution

Emitter Follower Circuit (Common Collector Amplifier)

An emitter follower is a Common Collector (CC) transistor amplifier configuration in which the input signal is applied to the base, and the output signal is taken directly across the emitter load resistor. The output voltage closely follows the input base voltage in both magnitude and phase, hence the name emitter follower.

Circuit Diagram

                    +Vcc
                     |
         +-----------+---------+
         |                     |
         [ R1                  | C (Collector tied to +Vcc)
         [                     |
         |     C1              |/ 
   Vin --+-----||---- B -------|   NPN Transistor
         |                     |\ 
         [ R2                  | v E
         [                     +-------||--------o Vout
         |                     |       C2
        --- Ground             [ RE
                               [
                               |
                              --- Ground

(Schematic, not to scale)

---

1. Working Characteristics

  • Voltage Gain (Av):
    Av = Vout / Vin ~= RE / (re + RE) ~= 1 (Always slightly less than 1, typically 0.98 to 0.99).
    Because Av is positive, there is 0° phase shift between input and output.
  • Current Gain (Ai):
    Ai = Ie / Ib = 1 + beta (Very high, typically 50 to 200).

---

2. Input Characteristics

  • The input is applied across the base and ground.
  • Input Resistance (Rin):
    Rin(base) = beta (re + RE) ~= beta RE
  • Taking into account the biasing resistors R1 and R2:
    Rin = R1 || R2 || [beta * (re + RE)]
  • Key Property: The input impedance of an emitter follower is extremely high (typically several hundreds of kilohms). It draws virtually no loading current from the preceding stage.

---

3. Output Characteristics

  • The output is taken across the emitter terminal and ground.
  • Output Resistance (Rout):
    Looking back into the emitter terminal, the output impedance is:
    Rout = RE || [ re + (R_source || R1 || R2) / beta ]
  • Key Property: The output impedance of an emitter follower is extremely low (typically 10 Ohm to 100 Ohm). It can supply sufficient drive current to low-impedance loads without dropping signal voltage.

Summary of Applications

Due to its very high input resistance and very low output resistance, the emitter follower is widely used as a buffer amplifier and an impedance matching stage between high-impedance signal sources and low-impedance loads.

Q.5 (a)

Question

Compare BJT & FET.

Solution

Comparison between BJT and FET

| Parameter | Bipolar Junction Transistor (BJT) | Field Effect Transistor (FET) | | :--- | :--- | :--- | | Carrier Type | Bipolar device (conduction involves both electrons and holes). | Unipolar device (conduction involves majority carriers only). | | Control Mechanism | Current-controlled device (output current IC is controlled by base current IB). | Voltage-controlled device (output current ID is controlled by gate-source voltage VGS). | | Input Impedance | Low to moderate (approx. 1 kOhm to 2 kOhm). | Very high (10^8 Ohm for JFET, up to 10^14 Ohm for MOSFET). | | Noise Level | More noisy due to carrier recombination at junctions. | Much lower noise level. | | Thermal Stability | Lower thermal stability; prone to thermal runaway. | Higher thermal stability; negative temperature coefficient at high currents prevents thermal runaway. | | Size / Integration | Larger physical area on silicon chip; less suitable for very high-density ICs. | Very compact physical size; ideal for modern VLSI/ULSI microprocessors and memories. | | Terminals | Emitter (E), Base (B), Collector (C). | Source (S), Gate (G), Drain (D). |

Q.5 (b)

Question

Explain OR gate using diodes.

Solution

Diode OR Gate

A 2-input OR gate produces a HIGH output (logic 1) if any one or both of its inputs are HIGH (logic 1). The output is LOW (logic 0) only when all inputs are LOW.

Circuit Diagram

   A o--------|>|-----+----------------o Output Y
               D1     |
   B o--------|>|-----+
               D2     |
                      [
                      ] R (Pull-down resistor)
                      [
                      |
                     --- Ground (0V)

(Schematic, not to scale)

Working Principle

Let logic levels be: Logic 0 = 0 V (Ground) and Logic 1 = +5 V.

  1. Case 1: Both inputs LOW (A = 0 V, B = 0 V)
  • Anodes of both diodes D1 and D2 are at 0 V, and the cathodes are tied to ground through pull-down resistor R.
  • Neither diode has a positive forward voltage.
  • Both diodes remain OFF (non-conducting).
  • No current flows through resistor R; therefore, the output voltage is Y = 0 V (Logic 0).
  1. Case 2: Input A is HIGH, B is LOW (A = 5 V, B = 0 V)
  • Diode D1 anode is at +5 V, so D1 is forward-biased (ON).
  • Diode D2 anode is at 0 V, so D2 is reverse-biased (OFF).
  • Current flows from input A through diode D1 and resistor R to ground.
  • Output voltage across R is: Y = 5 V - VD ~= 4.3 V (for Silicon diode), which represents Logic 1.
  1. Case 3: Input A is LOW, B is HIGH (A = 0 V, B = 5 V)
  • Diode D1 is OFF, while diode D2 is forward-biased (ON).
  • Current flows through D2 and resistor R.
  • Output voltage is approximately 4.3 V, which is recognized as Logic 1.
  1. Case 4: Both inputs HIGH (A = 5 V, B = 5 V)
  • Both diodes D1 and D2 are forward-biased and conduct in parallel.
  • Output Y = 5 V - 0.7 V = 4.3 V, representing Logic 1.

Truth Table

| Input A | Input B | Diode D1 | Diode D2 | Output Y | | :---: | :---: | :---: | :---: | :---: | | 0 V (0) | 0 V (0) | OFF | OFF | 0 V (0) | | 5 V (1) | 0 V (0) | ON | OFF | ~4.3 V (1) | | 0 V (0) | 5 V (1) | OFF | ON | ~4.3 V (1) | | 5 V (1) | 5 V (1) | ON | ON | ~4.3 V (1) |

Q.5 (c)

Question

Describe MOSFET operation and draw the structures for D-MOSFET & E-MOSFET.

Solution

Metal Oxide Semiconductor Field Effect Transistor (MOSFET)

A MOSFET is a four-terminal (Drain, Source, Gate, Body/Substrate) unipolar field-effect device whose gate is completely insulated from the conducting semiconductor channel by an extremely thin layer of silicon dioxide (SiO2).

---

1. Depletion-type MOSFET (D-MOSFET)

Structural Diagram (N-Channel D-MOSFET)
          Source (S)       Gate (G)       Drain (D)
             |                 |              |
          [Metal]           [Metal]        [Metal]
             |                 |              |
       +-----+                 |              +-----+
       |     |        +-----------------+     |     |
       | N+  |        |  SiO2 Insulator |     | N+  |
       |     |        +-----------------+     |     |
   ----+-----+--------------------------------+-----+----
   |         |======== Physical N-Channel ====|          |
   |                                                     |
   |                  P-type Substrate (SS)              |
   +-----------------------------------------------------+

(Schematic, not to scale)

Operation of D-MOSFET
  • The D-MOSFET has a physically fabricated channel between Source and Drain during manufacture.
  • Depletion Mode (VGS < 0): Applying a negative voltage to the gate repels electrons away from the channel into the P-substrate, creating a depletion region that narrows the channel and decreases drain current ID.
  • Enhancement Mode (VGS > 0): Applying a positive voltage to the gate attracts additional free electrons into the channel, widening the conducting path and increasing ID.

---

2. Enhancement-type MOSFET (E-MOSFET)

Structural Diagram (N-Channel E-MOSFET)
          Source (S)       Gate (G)       Drain (D)
             |                 |              |
          [Metal]           [Metal]        [Metal]
             |                 |              |
       +-----+        +-----------------+     +-----+
       |     |        |  SiO2 Insulator |     |     |
       | N+  |        +-----------------+     | N+  |
       |     |        :                 :     |     |
   ----+-----+--------:  Induced        :-----+-----+----
   |                  :  Inversion Layer:                |
   |                  :  (Channel)      :                |
   |                  P-type Substrate (SS)              |
   +-----------------------------------------------------+

(Schematic, not to scale)

Operation of E-MOSFET
  • The E-MOSFET has no built-in physical channel between the two N+ regions.
  • Off-State (VGS = 0): No continuous N-type path exists between Source and Drain; hence ID = 0 A regardless of VDS.
  • Enhancement Mode (VGS > VT):
  • When a positive gate-to-source voltage (VGS) exceeding the threshold voltage (VT) is applied, the positive gate field repels holes near the SiO2 surface and attracts minority electrons from the P-substrate.
  • These accumulated electrons create a thin N-type conducting channel called an inversion layer connecting the Source and Drain.
  • Once formed, applying VDS causes drain current ID to flow. Increasing VGS enhances the channel width, leading to higher drain current.

Q.5 (a) OR

Question

Discuss FET as an amplifier.

Solution

FET as an Amplifier

A Field Effect Transistor (FET) acts as a voltage-controlled amplifier when biased in its active (saturation/pinch-off) region. In this region, small fluctuations in input gate-to-source voltage (vgs) produce proportional changes in drain current (id), which develop an amplified AC voltage across a drain load resistor.

Common Source (CS) JFET Amplifier Circuit

                     +VDD
                       |
                       [
                       ] RD (Drain Resistor)
                       [
                       |
        C1             +--------||--------o Vout
   Vin --||----+-------| D      C2
               |       |/ 
               [ RG    |   N-Channel JFET
               [       |\ 
               |       +-------+
              ---      | S     |
             Ground    [ RS   === CS (Bypass)
                       [       |
                       |       |
                      ---+-------+-- Ground

(Schematic, not to scale)

Working Principle

  1. DC Biasing: Self-biasing using source resistor RS and gate resistor RG establishes the required negative gate-to-source voltage (VGS) to operate the FET in the saturation region.
  2. Small-Signal Action:
  • An input AC signal vin is coupled through capacitor C1 to the gate.
  • The total instantaneous gate voltage becomes: vGS = VGS + vin.
  • The small change in gate voltage controls the drain current through the FET transconductance (gm):
    id = gm vgs = gm vin
  1. Voltage Amplification:
  • The alternating drain current flows through the AC drain load (rd' = RD || RL).
  • The resulting output signal voltage is:
    vout = - id (RD || RL) = - gm vin * (RD || RL)
  • The negative sign indicates a 180° phase inversion between input and output.
  1. Voltage Gain Expression:
    Av = vout / vin = - gm * (RD || RL)

Key Advantages of FET Amplifiers

  • Extremely High Input Impedance: Since the gate junction is reverse-biased, it draws negligible current, preventing signal attenuation from high-impedance signal sources.
  • Low Noise: Being a unipolar device, it lacks junction recombination noise, making it superior for low-noise preamplifier stages.

Q.5 (b) OR

Question

Compare different logic families.

Solution

Comparison of Different Logic Families

| Parameter | TTL (Transistor-Transistor Logic) | CMOS (Complementary MOS) | ECL (Emitter-Coupled Logic) | RTL (Resistor-Transistor Logic) | | :--- | :--- | :--- | :--- | :--- | | Basic Building Device | BJTs and multi-emitter transistors | N-channel and P-channel MOSFETs | Non-saturating BJTs | Resistors and BJTs | | Propagation Delay | Moderate (~10 ns) | Low to Moderate (~15 to 30 ns) | Extremely Low (~1 ns, fastest) | High (~12 to 50 ns) | | Power Dissipation per Gate | Moderate (~10 mW) | Extremely Low in static state (~10 nW) | Very High (~40 to 60 mW) | Moderate (~12 mW) | | Noise Immunity / Noise Margin | Good (~0.4 V) | Excellent (~1.5 V to VDD/2) | Poor (~0.2 V) | Low (~0.2 V) | | Fan-Out | 10 | Very High (> 50) | High (~25) | Low (~4 to 5) | | Power Supply Voltage | Typically +5 V | Wide range (+3 V to +15 V) | Typically -5.2 V | Typically +3 V to +3.6 V | | Packing Density | Moderate | Very High (highest on-chip density) | Low | Low | | Primary Application | Standard digital circuitry | Microprocessors, VLSI memories, mobile devices | Supercomputers, ultra-high-frequency counters | Obsolete; early legacy computers |

Q.5 (c) OR

Question

Explain Drain characteristics and Transfer characteristics of JFET in detail with all related terms as Transconductance, drain resistance and amplification factor.

Solution

JFET Characteristics

A Junction Field Effect Transistor (JFET) is a three-terminal unipolar device where current conduction is controlled by the electric field of a reverse-biased PN junction.

---

1. Drain Characteristics (Output Characteristics)

The curve plotted between Drain Current (ID) and Drain-to-Source Voltage (VDS) at fixed values of Gate-to-Source Voltage (VGS).

   Drain Current ID (mA)
       ^
  IDSS |-------------+---------------------  VGS = 0V
       |            /| Saturation / Pinch-off Region
       |           / | 
       |          /  |---------------------  VGS = -1V
       | Ohmic   /   | 
       | Region /    |---------------------  VGS = -2V
       |       /     |
     0 +------+------+---------------------> VDS (V)
              VP     Breakdown

(Schematic, not to scale)

It consists of four distinct operational regions:

  1. Ohmic / Linear Region: At small VDS, the channel acts as a simple linear resistor obeying Ohm's law. ID increases linearly with VDS.
  2. Pinch-Off Voltage (VP): The value of VDS at which the two depletion layers meet near the drain end, constricting the channel to a minimum path.
  3. Saturation / Active Region: Beyond VP, ID remains nearly constant at its saturation level despite further increases in VDS. The value of ID when VGS = 0 in this region is called IDSS (Drain-to-Source Saturation Current).
  4. Breakdown Region: If VDS is increased excessively, avalanche breakdown occurs at the reverse-biased gate junction, causing ID to surge sharply.

---

2. Transfer Characteristics

The curve plotted between Drain Current (ID) and Gate-to-Source Voltage (VGS) for a constant VDS in the saturation region.

         ID (mA)
           ^
      IDSS |*
           |  * 
           |    * 
           |      *
   --------+--------*-----> VGS (V)
        -VGS(off)   0

(Schematic, not to scale)

  • It is non-linear and governed by Shockley's equation:
    ID = IDSS * [ 1 - (VGS / VGS(off)) ]^2
  • When VGS = 0, ID = IDSS.
  • When VGS = VGS(off) = -VP, the channel is completely pinched off, and ID = 0.

---

3. Related Small-Signal Parameters

A. Dynamic Drain Resistance (rd)
  • Definition: The ratio of a small change in drain-to-source voltage (Delta VDS) to the corresponding change in drain current (Delta ID) at a constant gate-to-source voltage.
  • Formula:
    rd = Delta VDS / Delta ID | (with VGS = constant)
  • In the saturation region, because the curve is nearly flat, rd is very high (typically 100 kOhm to 1 MOhm).
B. Transconductance (gm)
  • Definition: The ratio of a small change in drain current (Delta ID) to the corresponding change in gate-to-source voltage (Delta VGS) at a constant drain-to-source voltage.
  • Formula:
    gm = Delta ID / Delta VGS | (with VDS = constant)
  • Differentiating Shockley's equation with respect to VGS yields:
    gm = gm0 * [ 1 - (VGS / VGS(off)) ]
    where gm0 = (2 * IDSS) / |VGS(off)| is the maximum transconductance at VGS = 0.
  • Units: Siemens (S) or mA/V (typically 1 to 10 mA/V).
C. Amplification Factor (mu)
  • Definition: The ratio of a small change in drain-to-source voltage (Delta VDS) to the corresponding change in gate-to-source voltage (Delta VGS) required to keep the drain current constant.
  • Formula:
    mu = - Delta VDS / Delta VGS | (with ID = constant)
Relationship between the Parameters:

mu = (Delta VDS / Delta ID) (Delta ID / Delta VGS) mu = rd gm

Frequently Asked Questions

What is the passing mark criteria for GTU BE Semester 1 and 2 exams?

Why is the bridge rectifier preferred over the center-tapped full-wave rectifier?

What is the significance of the stability factor S in BJT amplifiers?

GTU Physics (3110018) Semester 1 & 2 Winter 2025 Solved Paper

Complete, student-friendly worked solutions for GTU Physics (Subject Code 3110018) Winter 2025 examination. Step-by-step answers for all theory, derivations, and numerical questions.

Introduction

This document contains fully worked, step-by-step solutions for the Gujarat Technological University (GTU) Bachelor of Engineering (BE) Semester I & II Physics examination (Subject Code: 3110018) held for Winter 2025. All numerical calculations are worked out with explicit formulas, substitution, and standard units, while theoretical concepts and derivations are presented with clear explanations and diagrams to help students prepare effectively.

Paper Information

University
Gujarat Technological University
Department
First Year Engineering (Common to All Branches)
Semester
Semester 1 & 2
Subject
Physics
Subject Code
3110018
Exam
Winter 2025
Year
2025

Questions and Solutions

Q.1 (a)

Question

Prove that Probability of occupancy of Fermi energy level is 0.5 at T > 0 K

Solution

Fermi-Dirac Distribution Function

The probability f(E) that an available electron energy state with energy E is occupied by an electron at an absolute temperature T is given by the Fermi-Dirac distribution function:

f(E) = 1 / [1 + exp((E - Ef) / (kB * T))]

Where:

  • E = Energy of the given state (Joules or eV)
  • Ef = Fermi energy level (Joules or eV)
  • kB = Boltzmann constant = 1.38 × 10⁻²³ J/K
  • T = Absolute temperature in Kelvin (K)

---

Proof for E = Ef at T > 0 K

  1. At the Fermi energy level, we set the state energy equal to the Fermi energy:
   E = Ef
  1. Substitute E = Ef into the exponent term:
   (E - Ef) / (kB * T) = (Ef - Ef) / (kB * T) = 0 / (kB * T)
  1. Since T > 0 K, the denominator is non-zero, giving:
   (E - Ef) / (kB * T) = 0
  1. Substituting this value into the exponential term:
   exp(0) = 1
  1. Substitute into the probability function:
   f(Ef) = 1 / [1 + exp(0)] = 1 / [1 + 1] = 1 / 2 = 0.5

Conclusion

At any absolute temperature above absolute zero (T > 0 K), the probability of finding an electron in the Fermi energy level is exactly 0.5 (or 50%). Hence proved.

Q.1 (b)

Question

Explain how the materials are classified into conductors, semiconductors and insulators with the help of energy band diagrams.

Solution

Classification of Materials Based on Energy Band Theory

In solid materials, electron energy states form continuous bands separated by forbidden energy gaps (band gap, Eg). Materials are classified into three primary categories depending on the size of the band gap and the filling of the valence band (VB) and conduction band (CB).

Energy Band Diagrams (Schematic, not to scale):

    Conductor             Semiconductor            Insulator
  -------------           -------------          -------------
  |Conduction |           |Conduction |          |Conduction |
  |   Band    |           |   Band    |          |   Band    |
  |===Over====|           -------------          -------------
  |===lap=====|                 ↑                      ↑
  |  Valence  |            Eg ≈ 1.1 eV             Eg > 3 to 5 eV
  |   Band    |                 ↓                      ↓
  -------------           -------------          -------------
                          |  Valence  |          |  Valence  |
                          |   Band    |          |   Band    |
                          -------------          -------------

---

1. Conductors (Metals)

  • Band Gap: There is no forbidden gap (Eg = 0 eV). The valence band and conduction band overlap, or the valence band is partially filled.
  • Electrical Conduction: A very large number of free electrons are readily available in the conduction band even at absolute zero (0 K). When a small electric field is applied, electrons easily gain energy and move, yielding very high electrical conductivity (typically 10⁶ to 10⁸ S/m).
  • Examples: Copper (Cu), Aluminum (Al), Silver (Ag).

---

2. Semiconductors

  • Band Gap: A small forbidden energy gap exists between the valence band and conduction band (typically Eg < 3 eV; for Silicon Eg ≈ 1.12 eV, for Germanium Eg ≈ 0.67 eV at room temperature).
  • Electrical Conduction: At 0 K, the valence band is completely full and the conduction band is completely empty, behaving like an insulator. At room temperature, thermal energy excites a small fraction of electrons across the band gap into the conduction band, leaving holes behind. Conductivity is moderate (10⁻⁶ to 10² S/m) and increases with temperature.
  • Examples: Silicon (Si), Germanium (Ge), Gallium Arsenide (GaAs).

---

3. Insulators

  • Band Gap: A very wide forbidden energy gap exists between the valence band and conduction band (Eg > 3 eV to 9 eV; for diamond Eg ≈ 5.4 eV).
  • Electrical Conduction: The valence band is completely filled and the conduction band is empty. Under ordinary conditions, thermal excitation cannot provide sufficient energy for valence electrons to cross the large gap. Therefore, virtually no free charge carriers exist, resulting in extremely low conductivity (< 10⁻¹⁰ S/m).
  • Examples: Diamond, Glass, Quartz, Mica.

Q.1 (c)

Question

Explain in detail how Kroning and Penney model explains the origin of band gap in semiconductors.

Solution

Introduction to the Kronig-Penney Model

The Kronig-Penney model is an idealized, one-dimensional quantum-mechanical model that explains the behavior of an electron moving in a periodic crystalline potential. In a crystal lattice, positive ion cores produce periodic potential wells. Kronig and Penney simplified this periodic potential into an array of rectangular potential wells and barriers.

Periodic Rectangular Potential Barrier Setup (schematic, not to scale):

    V(x) ^
         |     V0       V0       V0
         |   +----+   +----+   +----+
         |   |    |   |    |   |    |
       0 +---+----+---+----+---+----+-----> x
            -b    0   a   a+b
          Region I | Region II
  • Region I (Well): 0 < x < a, where potential V(x) = 0.
  • Region II (Barrier): -b < x < 0, where potential V(x) = V0.
  • The lattice periodicity is a + b.

---

Wave Equations and Boundary Conditions

According to the Time-Independent Schrödinger Equation:

  1. For Region I (0 < x < a, V = 0):
   d²ψ₁/dx² + α² ψ₁ = 0
   where α² = (2 * m * E) / ℏ²
  1. For Region II (-b < x < 0, V = V0 > E):
   d²ψ₂/dx² - β² ψ₂ = 0
   where β² = [2 * m * (V0 - E)] / ℏ²

According to Bloch's Theorem, the wave function in a periodic potential must satisfy:

ψ(x) = u(x) * exp(i * k * x)

where u(x) has the periodicity of the lattice: u(x + a + b) = u(x), and k is the electron wave vector.

Applying continuity conditions for ψ(x) and its derivative dψ/dx at boundaries x = 0 and x = a, and applying the Kronig-Penney simplification (letting the barrier height V0 → ∞ and barrier width b → 0 such that the product V0 * b remains finite), the condition for non-trivial solutions reduces to the famous Kronig-Penney equation:

P * [sin(α * a) / (α * a)] + cos(α * a) = cos(k * a)

Where:

  • P = (m V0 b * a) / ℏ² is the barrier strength or scattering power.
  • α = sqrt(2 m E) / ℏ relates directly to electron energy E.
  • k is the crystal wave vector.

---

Explanation of Allowed and Forbidden Bands

Let the left-hand side function be:

F(α * a) = P * [sin(α * a) / (α * a)] + cos(α * a)

Since the right-hand side is cos(k * a), and cosine can only have values between -1 and +1:

-1 ≤ F(α * a) ≤ +1
  1. Allowed Energy Bands:
  • For values of (α a) where |F(α a)| ≤ 1
, real solutions for k exist.
  • These energy ranges represent the allowed energy bands, where electrons can freely propagate through the crystal.
    1. Forbidden Energy Bands (Band Gaps):
    • For values of (α a) where |F(α a)| > 1
    , k becomes complex or imaginary, leading to exponentially decaying wavefunctions.
  • Electrons cannot propagate in these energy ranges. These regions form the energy band gaps (forbidden bands).
    1. Effect of P (Scattering Strength):
    • Case 1: If P → 0 (Completely free electrons):
      The equation becomes cos(α a) = cos(k a), so α = k. Energy becomes E = ℏ² k² / (2m), which is the continuous energy spectrum of completely free electrons with no band gaps.
    • Case 2: If P → ∞ (Tightly bound electrons):
      sin(α a) = 0 implies α
    a = n * π. The energy levels become discrete sharp lines, exactly as observed in isolated atoms.
  • Case 3: Finite P (Crystalline solids and semiconductors):
    The spectrum splits into alternating bands of allowed energy states and forbidden band gaps.
  • Conclusion

    The periodic potential of the atomic lattice reflects the electron waves destructively at the Brillouin zone boundaries (k = ±n * π / a), leading to energy discontinuities that naturally create the band gaps observed in semiconductors and insulators.

    Q.2 (a)

    Question

    Define Following Terms (i) Population Inversion , (ii) Meta stable state (iii) Active Medium

    Solution

    (i) Population Inversion

    Population Inversion is a non-equilibrium state of an atomic or molecular system in which the number of atoms or electrons in an excited higher energy state (N₂) exceeds the number of atoms in a lower energy state (N₁), i.e., N₂ > N₁.

    • Under normal thermal equilibrium conditions described by Boltzmann statistics, N₁ is always greater than N₂.
    • Population inversion is an essential prerequisite for stimulated emission to dominate over absorption, enabling laser action.

    ---

    (ii) Metastable State

    A metastable state is an excited atomic state that possesses an unusually long lifetime compared to ordinary excited states.

    • While standard excited states typically have lifetimes on the order of 10⁻⁸ seconds, a metastable state has an extended lifetime of 10⁻⁶ to 10⁻³ seconds (or longer).
    • This extended lifetime allows excited atoms to accumulate in the higher energy level, making population inversion achievable.

    ---

    (iii) Active Medium

    An active medium is the material or substance inside a laser system that contains the specific atoms, ions, or molecules capable of undergoing excitation and stimulated emission to amplify light.

    • When supplied with energy from an external source (pumping), the active medium supports population inversion and emits coherent laser radiation.
    • Examples: Helium-Neon gas mixture (He-Ne laser), Chromium-doped Sapphire crystal (Ruby laser), Nd:YAG crystal, or a semiconductor diode junction.

    Q.2 (b)

    Question

    Define carrier transport and explore how charge carriers move within semiconductor materials, emphasizing the mechanisms of drift and diffusion.

    Solution

    Carrier Transport in Semiconductors

    Carrier transport refers to the directional movement of charge carriers (free electrons in the conduction band and holes in the valence band) through a semiconductor lattice, resulting in an electric current.

    Charge carriers move via two independent physical mechanisms:

    1. Drift Mechanism
    2. Diffusion Mechanism

    ---

    1. Drift Mechanism

    • Definition: Drift is the directional motion of charge carriers under the influence of an applied external electric field (E).
    • Mechanism: In the absence of an electric field, carriers move randomly due to thermal energy with zero net current. When an electric field is applied, electrons experience an electrostatic force opposite to the field, and holes experience a force in the direction of the field, acquiring a net drift velocity (vd):
      vd = μ * E

    where μ is the carrier mobility.

    • Drift Current Densities:
    • Electron drift current density: Jn,drift = n * e * μn * E
    • Hole drift current density: Jp,drift = p * e * μp * E
    • Total drift current density: Jdrift = (n * μn + p μ_p) e E = σ E
      where σ is electrical conductivity.

    ---

    2. Diffusion Mechanism

    • Definition: Diffusion is the movement of charge carriers from a region of higher carrier concentration to a region of lower carrier concentration due to thermal motion and concentration gradients, independent of any electric field.
    • Mechanism: When a non-uniform distribution of carriers exists (such as localized photoexcitation or carrier injection at a junction), carriers spread out to achieve spatial equilibrium, obeying Fick's first law.
    • Diffusion Current Densities:
    • Electron diffusion current density: Jn,diff = e * Dn * (dn/dx)
    • Hole diffusion current density: Jp,diff = -e * Dp * (dp/dx)
      where Dn and D
    p are the electron and hole diffusion coefficients, and dn/dx and dp/dx are the concentration gradients.

    ---

    Total Current Density in a Semiconductor

    The total current is the algebraic sum of drift and diffusion components:

    J_total = J_n + J_p
    J_total = [n * e * μ_n * E + e * D_n * (dn/dx)] + [p * e * μ_p * E - e * D_p * (dp/dx)]

    Q.2 (c)

    Question

    Describe how to formulate the density of holes in the valence band for intrinsic semiconductors.

    Solution

    Density of Holes in the Valence Band

    In a semiconductor, the density of holes in the valence band, p, represents the number of unoccupied electron states per unit volume in the valence band at a given temperature T.

    ---

    Mathematical Formulation

    1. Basic Integral Formulation:

    The total hole concentration is given by the integral of the product of the density of states in the valence band, g_v(E), and the probability of a state being vacant (occupied by a hole), [1 - f(E)], from the lower energy boundary (-∞) to the top of the valence band (Ev):

    p = ∫_{-∞}^{Ev} g_v(E) * [1 - f(E)] dE
    1. Density of States in the Valence Band:

    Near the valence band edge (Ev), the density of quantum states per unit volume is:

    g_v(E) = [4 * π * (2 * m_h*)^(3/2) / h³] * sqrt(Ev - E)

    where m_h* is the effective mass of a hole and h is Planck's constant.

    1. Hole Occupancy Probability:

    The Fermi-Dirac distribution function for electrons is:

    f(E) = 1 / [1 + exp((E - Ef) / (kB * T))]

    The probability that a state is empty of an electron (hence contains a hole) is:

    1 - f(E) = 1 - 1 / [1 + exp((E - Ef) / (kB * T))]
             = exp((E - Ef) / (kB * T)) / [1 + exp((E - Ef) / (kB * T))]

    For an intrinsic semiconductor, the Fermi level Ef lies within the band gap well above Ev, such that (Ef - E) >> kB T (or Ef - Ev ≥ 3 kB

    T). Therefore, the exponential in the denominator is much smaller than 1:
    1 - f(E) ≈ exp(-(Ef - E) / (kB * T)) = exp((E - Ef) / (kB * T))
    1. Setting up the Integral:

    Substitute g_v(E) and 1 - f(E) into the integral:

    p = [4 * π * (2 * m_h*)^(3/2) / h³] * ∫_{-∞}^{Ev} sqrt(Ev - E) * exp((E - Ef) / (kB * T)) dE

    Rewrite exp((E - Ef) / (kB T)) as exp(-(Ef - Ev) / (kB

    T)) exp(-(Ev - E) / (kB T)):
    p = [4 * π * (2 * m_h*)^(3/2) / h³] * exp(-(Ef - Ev) / (kB * T)) * ∫_{-∞}^{Ev} sqrt(Ev - E) * exp(-(Ev - E) / (kB * T)) dE
    1. Evaluating the Integral:

    Let x = (Ev - E) / (kB * T). Then:

    • When E = Ev, x = 0
    • When E → -∞, x → ∞
    • Ev - E = kB T x
    • dE = -(kB * T) dx

    Substituting these variables:

    ∫_{-∞}^{Ev} sqrt(Ev - E) * exp(-(Ev - E) / (kB * T)) dE = (kB * T)^(3/2) * ∫_{0}^{∞} x^(1/2) * exp(-x) dx

    The standard gamma function integral evaluates to:

    ∫_{0}^{∞} x^(1/2) * exp(-x) dx = Γ(3/2) = (1/2) * sqrt(π)
    1. Final Expression for Hole Concentration:

    Multiplying back:

    p = [4 * π * (2 * m_h*)^(3/2) / h³] * (kB * T)^(3/2) * [(sqrt(π) / 2)] * exp(-(Ef - Ev) / (kB * T))

    Simplifying the numerical factors:

    p = 2 * [(2 * π * m_h* * kB * T) / h²]^(3/2) * exp(-(Ef - Ev) / (kB * T))

    We define the effective density of states in the valence band (Nv) as:

    Nv = 2 * [(2 * π * m_h* * kB * T) / h²]^(3/2)

    Thus, the expression for the hole density in the valence band is:

    p = Nv * exp(-(Ef - Ev) / (kB * T))

    Q.2 (c) OR

    Question

    Describe the definition of carrier concentration in intrinsic semiconductors and show how to derive the formula for electron density in the conduction band.

    Solution

    Carrier Concentration in Intrinsic Semiconductors

    Definition: In an intrinsic (pure) semiconductor without any dopant impurities, charge carriers are generated solely through thermal excitation across the energy band gap. This process produces equal numbers of free electrons in the conduction band and holes in the valence band:

    n = p = ni

    where:

    • n = Electron density in the conduction band (m⁻³ or cm⁻³)
    • p = Hole density in the valence band (m⁻³ or cm⁻³)
    • ni = Intrinsic carrier concentration

    ---

    Derivation of Electron Density in the Conduction Band (n)

    1. Fundamental Integral:

    The concentration of electrons in the conduction band is obtained by integrating the product of the density of available quantum states g_c(E) and the probability of occupation f(E) from the conduction band edge (Ec) to the top of the band (∞):

    n = ∫_{Ec}^{∞} g_c(E) * f(E) dE
    1. Density of States in Conduction Band:

    For electrons near the bottom of the conduction band:

    g_c(E) = [4 * π * (2 * m_e*)^(3/2) / h³] * sqrt(E - Ec)

    where m_e* is the electron effective mass and h is Planck's constant.

    1. Fermi-Dirac Distribution:
    f(E) = 1 / [1 + exp((E - Ef) / (kB * T))]

    For intrinsic and non-degenerate semiconductors, the Fermi level Ef is situated within the band gap such that (Ec - Ef) >> kB T (at least 3 kB

    T). The exponential term is much greater than 1, allowing the Fermi-Dirac distribution to be approximated by Maxwell-Boltzmann statistics:
    f(E) ≈ exp(-(E - Ef) / (kB * T))
    1. Integration:

    Substitute g_c(E) and f(E) into the integral:

    n = [4 * π * (2 * m_e*)^(3/2) / h³] * ∫_{Ec}^{∞} sqrt(E - Ec) * exp(-(E - Ef) / (kB * T)) dE

    We can split the exponential:

    exp(-(E - Ef) / (kB * T)) = exp(-(Ec - Ef) / (kB * T)) * exp(-(E - Ec) / (kB * T))

    Taking constants outside the integral:

    n = [4 * π * (2 * m_e*)^(3/2) / h³] * exp(-(Ec - Ef) / (kB * T)) * ∫_{Ec}^{∞} sqrt(E - Ec) * exp(-(E - Ec) / (kB * T)) dE
    1. Variable Substitution:

    Let y = (E - Ec) / (kB * T). Then:

    • E - Ec = kB T y
    • dE = kB T dy
    • Limits: When E = Ec, y = 0; when E → ∞, y → ∞

    The integral becomes:

    (kB * T)^(3/2) * ∫_{0}^{∞} y^(1/2) * exp(-y) dy

    Using the standard Gamma function identity:

    ∫_{0}^{∞} y^(1/2) * exp(-y) dy = Γ(3/2) = (1/2) * sqrt(π)
    1. Final Expression:
    n = [4 * π * (2 * m_e*)^(3/2) / h³] * (kB * T)^(3/2) * [(sqrt(π) / 2)] * exp(-(Ec - Ef) / (kB * T))

    Simplifying terms:

    n = 2 * [(2 * π * m_e* * kB * T) / h²]^(3/2) * exp(-(Ec - Ef) / (kB * T))

    Defining the effective density of states in the conduction band (Nc) as:

    Nc = 2 * [(2 * π * m_e* * kB * T) / h²]^(3/2)

    We obtain the formula for electron density in the conduction band:

    n = Nc * exp(-(Ec - Ef) / (kB * T))

    Q.3 (a)

    Question

    Determine the band gap of the material when the light source composed of it emits radiation with a wavelength of 8628 Å.

    Solution

    1. Given Information

    • Emitted wavelength (λ) = 8628 Å = 8628 × 10⁻¹⁰ m = 8.628 × 10⁻⁷ m
    • Planck's constant (h) = 6.626 × 10⁻³⁴ J·s
    • Speed of light (c) = 3 × 10⁸ m/s
    • Electronic charge (e) = 1.602 × 10⁻¹⁹ C

    2. What is Required

    • Energy band gap of the material (Eg) in Joules (J) and electron-volts (eV).

    3. Formula

    Radiation emitted during interband radiative recombination corresponds to the band gap energy:

    Eg = h * c / λ

    To express the band gap directly in electron-volts (eV):

    Eg (in eV) = (h * c) / (λ * e) ≈ 12400 / λ (in Å)

    4. Calculation Steps

    1. Calculation in Joules (J):
       Eg = (6.626 × 10⁻³⁴ J·s × 3 × 10⁸ m/s) / (8.628 × 10⁻⁷ m)
       Eg = (1.9878 × 10⁻²⁵) / (8.628 × 10⁻⁷)
       Eg = 2.3039 × 10⁻¹⁹ J
    1. Conversion to electron-volts (eV):
       Eg = (2.3039 × 10⁻¹⁹ J) / (1.602 × 10⁻¹⁹ J/eV)
       Eg = 1.438 eV

    5. Final Answer

    The band gap of the material is 1.44 eV (or 2.30 × 10⁻¹⁹ J).

    Q.3 (b)

    Question

    Explain construction and working of PV solar cell.

    Solution

    Photovoltaic (PV) Solar Cell

    A photovoltaic (PV) solar cell is a specialized semiconductor p-n junction diode that directly converts solar/light energy into electrical energy using the photovoltaic effect.

    ---

    Construction

    Schematic Diagram of a Silicon PV Solar Cell (not to scale):
    
                     Sunlight (Photons)
                     ↓↓↓↓   ↓↓↓↓   ↓↓↓↓
            ==============================  <-- Top Metal Grid / Finger Contacts
            ------------------------------  <-- Anti-reflection Coating (ARC)
            ++++++++++++++++++++++++++++++  <-- Thin n-type Emitter Layer (~0.3 μm)
            ------------------------------  <-- Depletion Region (W)
            
            ..............................  <-- Thick p-type Base Layer (~300 μm)
            
            ==============================  <-- Continuous Bottom Metal Contact
    • Substrate / Base: A relatively thick (around 200–300 µm) p-type silicon wafer forms the base.
    • Emitter Layer: A very thin, heavily doped n-type silicon layer (~0.3 µm) is formed on the top surface by phosphorus diffusion. The top layer is kept thin to ensure incident photons penetrate directly into and near the depletion layer.
    • Depletion Region: A built-in electric field exists naturally at the p-n junction.
    • Anti-Reflection Coating (ARC): A layer of silicon nitride (Si₃N₄) or titanium dioxide (TiO₂) is deposited on top to reduce surface reflection of incoming sunlight.
    • Contacts: A metallic grid pattern is applied to the front surface to collect electrons while allowing light to pass, and a full-area metallic layer (typically aluminum or silver) forms the back contact.

    ---

    Working Principle

    The operation of a solar cell involves three sequential steps:

    1. Generation of Electron-Hole Pairs:
      Incident photons with energy greater than the band gap of silicon (hν ≥ Eg ≈ 1.12 eV) are absorbed near the junction, exciting electrons from the valence band to the conduction band and creating electron-hole (e-h) pairs.
    1. Separation of Charge Carriers:
      The strong built-in electric field in the depletion region sweeps generated electrons toward the n-side and holes toward the p-side before they can recombine.
    1. Collection and Current Flow:
    • Electrons accumulate in the n-layer (making it negatively charged), and holes accumulate in the p-layer (making it positively charged).
    • This builds an open-circuit photovoltage (Voc) across the terminals.
    • When an external load resistor (RL) is connected, photo-generated electrons flow through the external circuit, producing a continuous direct current (photocurrent, Iph).

    Q.3 (c)

    Question

    Interpret the process of deriving the Fermi level expression for n-Type semiconductors, and subsequently, utilize this expression to compute the electron density in the conduction band.

    Solution

    1. Introduction and Charge Neutrality Condition

    In an n-type semiconductor, donor impurities of concentration Nd are added to an intrinsic host crystal. At ordinary operating temperatures, complete ionization occurs, so almost all donor atoms donate an electron:

    Nd⁺ ≈ Nd

    From the condition of electrical neutrality:

    n = p + Nd⁺

    Since donor doping makes the electron concentration substantially larger than the hole concentration (n >> p), we can safely approximate:

    n ≈ Nd

    ---

    2. Derivation of the Fermi Level Expression for n-Type Semiconductors

    The electron density in the conduction band is given by:

    n = Nc * exp(-(Ec - Ef) / (kB * T))

    where:

    • Nc = Effective density of states in the conduction band = 2 [(2 π m_e kB T) / h²]^(3/2)
    • Ec = Energy of the conduction band edge
    • Ef = Fermi energy level in the n-type semiconductor (Efn)
    • kB = Boltzmann constant
    • T = Temperature in Kelvin

    Equating n to the active donor concentration Nd:

    Nd = Nc * exp(-(Ec - Ef) / (kB * T))

    Divide both sides by Nc:

    exp(-(Ec - Ef) / (kB * T)) = Nd / Nc

    Invert the exponential by taking the reciprocal:

    exp((Ec - Ef) / (kB * T)) = Nc / Nd

    Take the natural logarithm (ln) on both sides:

    (Ec - Ef) / (kB * T) = ln(Nc / Nd)

    Multiply by kB * T:

    Ec - Ef = kB * T * ln(Nc / Nd)

    Rearrange to solve for the Fermi level Ef:

    Ef = Ec - kB * T * ln(Nc / Nd)

    Alternatively, written using properties of logarithms:

    Ef = Ec + kB * T * ln(Nd / Nc)
    • Interpretation: Since Nc > Nd under non-degenerate conditions, ln(Nc / Nd) > 0. Therefore, Ef lies slightly below the bottom of the conduction band Ec. As the donor concentration Nd increases, Ef moves closer to Ec.

    ---

    3. Computation of Electron Density in the Conduction Band

    Substitute the derived expression for Ef back into the equation for electron density:

    n = Nc * exp(-(Ec - Ef) / (kB * T))

    Substitute (Ec - Ef) = kB T ln(Nc / Nd):

    n = Nc * exp(-[kB * T * ln(Nc / Nd)] / (kB * T))
    n = Nc * exp(-ln(Nc / Nd))
    n = Nc * exp(ln(Nd / Nc))
    n = Nc * (Nd / Nc)
    n = Nd

    Conclusion

    This confirms that at room temperature, all donor atoms are ionized, and the total free electron density in the conduction band is directly determined by the donor doping concentration: n = Nd.

    Q.3 (a) OR

    Question

    The intrinsic carrier concentration at room temp in Germanium is 4.17×1018 m-3. The mobility of Electron and Hole are 0.29 m2/VSec and 0.16 m2/vSec respectively. Find out its Resistivity

    Solution

    1. Given Information

    • Intrinsic carrier concentration of Germanium (ni) = 4.17 × 10¹⁸ m⁻³
    • Electron mobility (μe) = 0.29 m²/(V·s)
    • Hole mobility (μh) = 0.16 m²/(V·s)
    • Electronic charge (e) = 1.602 × 10⁻¹⁹ C

    2. What is Required

    • Electrical resistivity (ρ) of intrinsic Germanium in Ω·m.

    3. Formulas

    • Electrical conductivity of an intrinsic semiconductor (σ):
      σ = ni * e * (μe + μh)
    • Electrical resistivity (ρ) is the reciprocal of conductivity:
      ρ = 1 / σ = 1 / [ni * e * (μe + μh)]

    4. Calculation Steps

    1. Calculate the sum of mobilities:
       μe + μh = 0.29 + 0.16 = 0.45 m²/(V·s)
    1. Calculate electrical conductivity (σ):
       σ = (4.17 × 10¹⁸ m⁻³) × (1.602 × 10⁻¹⁹ C) × (0.45 m²/(V·s))
       σ = 4.17 × 1.602 × 0.45 × 10⁻¹
       σ = 3.0062 × 10⁻¹ = 0.3006 S/m (or Ʊ/m)
    1. Calculate resistivity (ρ):
       ρ = 1 / σ = 1 / 0.3006
       ρ = 3.327 Ω·m

    5. Final Answer

    The resistivity of the Germanium sample is 3.33 Ω·m.

    Q.3 (b) OR

    Question

    The conductivity of a semiconductor at 30 ℃ is 742 Ʊ/m and at 90 ℃ is 2100 Ʊ/m. Calculate the Energy Band Gap.

    Solution

    1. Given Information

    • Temperature T1 = 30 °C = 30 + 273.15 = 303.15 K
    • Conductivity at T1 (σ1) = 742 Ʊ/m (S/m)
    • Temperature T2 = 90 °C = 90 + 273.15 = 363.15 K
    • Conductivity at T2 (σ2) = 2100 Ʊ/m (S/m)
    • Boltzmann constant (kB) = 1.38 × 10⁻²³ J/K = 8.617 × 10⁻⁵ eV/K

    2. What is Required

    • Energy Band Gap (Eg) of the semiconductor.

    3. Formula

    The temperature dependence of electrical conductivity in an intrinsic semiconductor is governed by:

    σ(T) = σ0 * exp(-Eg / (2 * kB * T))

    Taking the ratio of conductivities at temperatures T2 and T1:

    σ2 / σ1 = exp[ (Eg / (2 * kB)) * (1/T1 - 1/T2) ]

    Taking natural logarithms on both sides:

    ln(σ2 / σ1) = (Eg / (2 * kB)) * [ (T2 - T1) / (T1 * T2) ]

    Solving for Eg:

    Eg = [ 2 * kB * ln(σ2 / σ1) * T1 * T2 ] / (T2 - T1)

    4. Calculation Steps

    1. Calculate the ratio of conductivities and its logarithm:
       σ2 / σ1 = 2100 / 742 ≈ 2.83019
       ln(2.83019) = 1.04034
    1. Calculate temperature parameters:
       T2 - T1 = 363.15 - 303.15 = 60.0 K
       T1 * T2 = 303.15 × 363.15 = 110088.92 K²
       (T1 * T2) / (T2 - T1) = 110088.92 / 60 = 1834.815 K
    1. Compute Eg in eV using kB = 8.617 × 10⁻⁵ eV/K:
       Eg = 2 × (8.617 × 10⁻⁵ eV/K) × 1.04034 × 1834.815 K
       Eg = 0.17929 × 1.834815
       Eg = 0.329 eV
    1. Equivalent calculation in Joules:
       Eg = 0.329 eV × 1.602 × 10⁻¹⁹ J/eV = 5.27 × 10⁻²⁰ J

    5. Final Answer

    The energy band gap of the semiconductor is 0.329 eV (or 5.27 × 10⁻²⁰ J).

    Q.3 (c) OR

    Question

    Discuss the Einstein’s theory about interaction between matter and radiation in detail. Also discuss the absorption and emission with necessary equation.

    Solution

    Einstein's Theory of Matter-Radiation Interaction

    In 1917, Albert Einstein proposed that the interaction between electromagnetic radiation and matter involves three fundamental transition processes between two atomic energy levels (E₁ and E₂ with E₂ > E₁):

    1. Stimulated Absorption
    2. Spontaneous Emission
    3. Stimulated Emission

    ---

    1. Three Interaction Processes

    Transition Diagrams (schematic, not to scale):
    
    (a) Induced Absorption        (b) Spontaneous Emission      (c) Stimulated Emission
    
      E2 -----------               E2 ---•-------                E2 ---•-------  
            ↑                             ↓                             ↓  
         hν ~> •                       hν ~>                         hν ~>  ~~> hν
                                                                            ~~> hν
      E1 ---•-------               E1 -----------                E1 -----------  
    A. Stimulated (Induced) Absorption

    An atom in the lower energy state E₁ absorbs an incident photon of energy hν = E₂ - E₁ and transitions to the higher excited state E₂.

    • The rate of stimulated absorption is proportional to the number of atoms in level 1 (N₁) and the radiation energy density u(ν):
      R_abs = B₁₂ * N₁ * u(ν)

    where B₁₂ is the Einstein coefficient of stimulated absorption.

    B. Spontaneous Emission

    An excited atom in state E₂ transitions spontaneously to lower state E₁ without any external influence, emitting a photon of energy hν = E₂ - E₁. The emitted photons have random phase, direction, and polarization (incoherent light).

    • The rate of spontaneous emission depends solely on the population N₂:
      R_spont = A₂₁ * N₂

    where A₂₁ is the Einstein coefficient of spontaneous emission.

    C. Stimulated Emission

    An incident photon of energy hν = E₂ - E₁ triggers an excited atom in state E₂ to drop to state E₁, emitting a second photon identical to the incident photon in frequency, phase, direction, and polarization (coherent light).

    • The rate of stimulated emission is proportional to the population N₂ and radiation density u(ν):
      R_stim = B₂₁ * N₂ * u(ν)

    where B₂₁ is the Einstein coefficient of stimulated emission.

    ---

    2. Derivation of Einstein's Relations

    Under thermal equilibrium at temperature T:

    Rate of upward transitions (Absorption) = Rate of downward transitions (Total Emission)
    
    B₁₂ * N₁ * u(ν) = A₂₁ * N₂ + B₂₁ * N₂ * u(ν)

    Rearranging for u(ν):

    u(ν) * [B₁₂ * N₁ - B₂₁ * N₂] = A₂₁ * N₂
    
    u(ν) = (A₂₁ * N₂) / [B₁₂ * N₁ - B₂₁ * N₂]

    Divide numerator and denominator by B₂₁ * N₂:

    u(ν) = (A₂₁ / B₂₁) / [ (B₁₂ / B₂₁) * (N₁ / N₂) - 1 ]

    According to Boltzmann's Distribution Law:

    N₁ / N₂ = exp((E₂ - E₁) / (kB * T)) = exp(hν / (kB * T))

    Substitute this into the expression for u(ν):

    u(ν) = (A₂₁ / B₂₁) / [ (B₁₂ / B₂₁) * exp(hν / (kB * T)) - 1 ]     ---- (Equation 1)

    According to Planck's Radiation Law, the energy density of blackbody radiation is:

    u(ν) = (8 * π * h * ν³ / c³) / [ exp(hν / (kB * T)) - 1 ]       ---- (Equation 2)

    Comparing Equation (1) with Equation (2):

    1. The coefficients of stimulated processes must be equal:
       B₁₂ / B₂₁ = 1  ==>  B₁₂ = B₂₁

    (Probability of stimulated absorption is equal to probability of stimulated emission.)

    1. The ratio of spontaneous to stimulated emission coefficients is:
       A₂₁ / B₂₁ = (8 * π * h * ν³) / c³

    Significance

    • The ratio A₂₁ / B₂₁ is directly proportional to ν³. Hence, as photon frequency increases (e.g., in X-rays or gamma rays), spontaneous emission dominates strongly, making it harder to establish laser action at very high frequencies.
    • The equality B₁₂ = B₂₁ provides the physical foundation for optical amplification and lasers.

    Q.4 (a)

    Question

    A Silicon plate of thickness 1mm, breadth 10 mm and length 100 mm is placed in a magnetic field of 0.5 Wb/m2 acting along its thickness. If 0.01 A current flows along its length, calculate the Hall coefficient if developed Hall voltage is 1.83 mV.

    Solution

    1. Given Information

    • Thickness of plate along the magnetic field direction (t) = 1 mm = 1 × 10⁻³ m
    • Breadth of the plate (b) = 10 mm = 10 × 10⁻³ m = 0.01 m
    • Length of the plate (L) = 100 mm = 100 × 10⁻³ m = 0.1 m
    • Applied magnetic field (B) = 0.5 Wb/m² (Tesla)
    • Current flowing through length (I) = 0.01 A
    • Developed Hall voltage (VH) = 1.83 mV = 1.83 × 10⁻³ V

    2. What is Required

    • Hall coefficient (RH) of the Silicon plate.

    3. Formula

    The Hall voltage developed across a rectangular conductor or semiconductor is given by:

    VH = (RH * I * B) / t

    where t is the thickness of the sample parallel to the magnetic field vector B.

    Rearranging to solve for the Hall coefficient RH:

    RH = (VH * t) / (I * B)

    4. Calculation Steps

    1. Substitute given values:
       RH = (1.83 × 10⁻³ V × 1 × 10⁻³ m) / (0.01 A × 0.5 Wb/m²)
    1. Evaluate the numerator:
       Numerator = 1.83 × 10⁻⁶ V·m
    1. Evaluate the denominator:
       Denominator = 0.01 × 0.5 = 0.005 A·Wb/m² = 5 × 10⁻³
    1. Divide to find RH:
       RH = (1.83 × 10⁻⁶) / (5 × 10⁻³)
       RH = 0.366 × 10⁻³ m³/C
       RH = 3.66 × 10⁻⁴ m³/C

    5. Final Answer

    The Hall coefficient of the Silicon plate is 3.66 × 10⁻⁴ m³/C.

    Q.4 (b)

    Question

    Discuss in detail Four probe method used for resistivity measurements in thin sheet.

    Solution

    Four-Probe Method for Resistivity Measurement

    The Four-Probe (or collinear Kelvin probe) method is an accurate experimental technique used to measure the electrical resistivity of semiconductors and thin conducting sheets without errors introduced by probe contact resistance.

    ---

    Experimental Setup

    Four-Probe Setup Diagram (schematic, not to scale):
    
            Constant Current Source (I)
              [ + ]------------[ - ]
                |                |
                |   Voltmeter(V) |  
                |     [+]  [-]   |  
                |      |    |    |
                ↓      ↓    ↓    ↓
              Probe1 Probe2 Probe3 Probe4
                |      |    |    |
              ──●──────●────●────●──
              |   s      s     s   |
              |                    |  <-- Semiconductor Sheet (Thickness = t)
              ----------------------
    • The setup consists of four equally spaced, collinear, spring-loaded tungsten metal probes placed in contact with the flat surface of the thin sheet.
    • The probe separation is designated as s (typically 1 mm to 2 mm apart).
    • Outer Probes (1 and 4): Connected to a high-precision constant DC current source that injects current I.
    • Inner Probes (2 and 3): Connected to a high-impedance digital voltmeter (DVM) to measure the potential drop V.

    ---

    Why Four Probes Instead of Two?

    In a conventional two-probe measurement, the measured resistance includes contact resistance between the metal tips and the semiconductor surface, spreading resistance, and lead wire resistance. In the four-probe method:

    1. The current passes through the outer probes.
    2. The voltmeter draws virtually zero current due to its extremely high input impedance (~10¹² Ω).
    3. Consequently, no voltage drop occurs across the contact resistance at the inner probes, providing an accurate reading of the bulk material resistance.

    ---

    Mathematical Formulation for Thin Sheets

    For a thin conducting sheet where the thickness t is much smaller than the probe spacing s (i.e., t << s), the current expands radially in two dimensions:

    1. Sheet Resistance (Rs):
      The sheet resistance is related to the measured voltage V and current I by:
       Rs = [ π / ln(2) ] * (V / I) ≈ 4.532 * (V / I)
    1. Bulk Resistivity (ρ):
      Since bulk resistivity equals sheet resistance multiplied by thickness t:
       ρ = Rs * t = [ π / ln(2) ] * (V / I) * t
       ρ = 4.532 * (V / I) * t  (Ω·m or Ω·cm)

    If the sample has finite lateral dimensions (boundaries close to the probes), a geometric correction factor F is included: ρ = 4.532 (V / I) t * F.

    Q.4 (c)

    Question

    Define density of states and obtain expression for the density of states in terms of mass of electron(m), Planck’s constant (h) and Energy (E).

    Solution

    1. Definition of Density of States

    The Density of States, denoted by g(E) or Z(E), is defined as the number of available quantum electron states per unit energy range per unit volume of the material at energy level E:

    g(E) = (1 / V) * (dN / dE)

    where dN is the number of available quantum states in the energy interval between E and E + dE, and V is the crystal volume.

    ---

    2. Derivation of Expression for Density of States

    1. Electron in a Three-Dimensional Potential Well:

    Consider a free electron enclosed in a cubical crystal of side length L (Volume V = L³). The energy of an electron in terms of quantum numbers (nx, ny, nz) is:

    E = [h² / (8 * m * L²)] * (nx² + ny² + nz²)

    where m is the mass of the electron and h is Planck's constant.

    1. Radius in Quantum Number Space:

    Let n² = nx² + ny² + nz². Then:

    E = [h² / (8 * m * L²)] * n²

    Solving for n:

    n² = (8 * m * L² * E) / h²
    n = (2 * L / h) * sqrt(2 * m * E)     ---- (Equation 1)
    1. Volume in n-space:

    Each set of positive integers (nx, ny, nz ≥ 1) represents one distinct spatial orbital state.

    • All states with energy less than or equal to E lie within the positive octant (nx > 0, ny > 0, nz > 0) of a sphere of radius n in quantum-number space.
    • The total number of spatial states within energy E is:
      N_spatial = (1/8) * [ (4/3) * π * n³ ] = (π / 6) * n³
    1. Inclusion of Electron Spin:

    According to the Pauli Exclusion Principle, each spatial state can hold two electrons of opposite spins (spin up and spin down):

    N(E) = 2 * N_spatial = 2 * [ (π / 6) * n³ ] = (π / 3) * n³
    1. Substitute n from Equation (1):
    N(E) = (π / 3) * [ (2 * L / h) * sqrt(2 * m * E) ]³
    N(E) = (π / 3) * [ 8 * L³ / h³ ] * (2 * m * E)^(3/2)
    N(E) = [ 8 * π * V / (3 * h³) ] * (2 * m)^(3/2) * E^(3/2)

    where V = L³ is the volume of the material.

    1. Differentiation with respect to Energy E:

    The density of states per unit volume is g(E) = (1 / V) * (dN / dE):

    dN/dE = [ 8 * π * V / (3 * h³) ] * (2 * m)^(3/2) * [ (3/2) * E^(1/2) ]
    dN/dE = [ 4 * π * V / h³ ] * (2 * m)^(3/2) * E^(1/2)

    Dividing by volume V:

    g(E) = (1 / V) * (dN / dE) = [ 4 * π / h³ ] * (2 * m)^(3/2) * sqrt(E)

    Alternatively, expanding (2 m)^(3/2) = 2 sqrt(2) * m^(3/2):

    g(E) = [ 8 * sqrt(2) * π * m^(3/2) / h³ ] * E^(1/2)

    Conclusion

    The density of available energy states is proportional to the square root of energy: g(E) ∝ E^(1/2).

    Q.4 (a) OR

    Question

    What is hot point probe method? Explain

    Solution

    Hot Point Probe Method

    The hot point probe method (also known as the thermal probe method) is a simple, non-destructive experimental technique used to determine whether a semiconductor sample is n-type or p-type.

    ---

    Experimental Setup and Working Principle

    Hot Probe Setup (schematic, not to scale):
    
           Hot Probe (Heated)           Cold Probe (Room Temp)
                (+)                           (-)
                 |                             |
                 ↓                             ↓
              ───●─────────────────────────────●───
              |      Semiconductor Sample         |
              ─────────────────────────────────────
                           |          |
                           +---[ μV ]-+   (Sensitive Microvoltmeter / Galvanometer)
    1. Setup:
    • Two metal contact probes are placed on the surface of the semiconductor specimen.
    • One probe is heated (using an internal resistance coil or soldering iron tip) to maintain a higher temperature (Hot Probe).
    • The other probe remains at ambient room temperature (Cold Probe).
    • A sensitive center-zero microvoltmeter or galvanometer is connected between the two probes.
    1. Operating Principle (Seebeck Effect):
    • The localized temperature difference creates a thermal gradient across the sample.
    • Charge carriers near the hot probe acquire higher thermal kinetic energy than those near the cold probe.
    • Consequently, the majority charge carriers diffuse away from the hot probe toward the cold probe.

    ---

    Identification of Carrier Type

    • For n-type Semiconductors:
    • Majority carriers are electrons (negative charge).
    • Electrons diffuse from the hot probe to the cold probe.
    • The cold probe accumulates negative charge (becomes negative potential), leaving the hot probe with a net positive potential.
    • Therefore, the hot probe is positive (+) with respect to the cold probe.
    • For p-type Semiconductors:
    • Majority carriers are holes (positive charge).
    • Holes diffuse from the hot probe toward the cold probe.
    • The cold probe accumulates positive charge (becomes positive potential), leaving the hot probe with a net negative potential.
    • Therefore, the hot probe is negative (-) with respect to the cold probe.

    Q.4 (b) OR

    Question

    List the condition to be satisfied to use Vander Pauw technique and derive expression of bulk resistivity measurement using it.

    Solution

    Van der Pauw Technique

    The Van der Pauw method is an experimental technique used to measure the resistivity and Hall coefficient of an arbitrary, flat, two-dimensional sample of uniform thickness.

    ---

    1. Conditions to be Satisfied

    To apply the Van der Pauw technique, the specimen must meet the following four conditions:

    1. The sample must have a flat shape of uniform thickness (t).
    2. The sample surface must be singly connected (it must contain no through-holes or isolated non-conducting islands).
    3. The four electrical contacts must be located at the exact periphery (edges) of the sample.
    4. The contact areas must be infinitesimally small compared to the total surface area of the sample.

    ---

    2. Derivation of Resistivity Expression

    Arbitrary Van der Pauw Sample (schematic, not to scale):
    
                 Contact 1      Contact 2
                    (●)───────────(●)
                   /                 \
                  |   Flat Sample     |
                  |   Thickness = t   |
                   \                 /
                    (●)───────────(●)
                 Contact 4      Contact 3

    Let four small contacts placed consecutively along the perimeter be numbered 1, 2, 3, and 4.

    1. Characteristic Resistances:
    • Inject a direct current I₁₂ through contacts 1 and 2, and measure the resulting voltage V₄₃ across contacts 4 and 3. Define the resistance:
         R_A = R₁₂,₄₃ = |V₄₃| / I₁₂
    • Inject a direct current I₂₃ through contacts 2 and 3, and measure the resulting voltage V₁₄ across contacts 1 and 4. Define the resistance:
         R_B = R₂₃,₁₄ = |V₁₄| / I₂₃
    1. Van der Pauw Theorem:
      Van der Pauw proved using conformal mapping that these two characteristic resistances satisfy the relation:
       exp(-π * R_A * t / ρ) + exp(-π * R_B * t / ρ) = 1

    where:

    • ρ = Bulk resistivity of the material (Ω·m)
    • t = Thickness of the sample (m)
    1. Derivation for Symmetrical Geometry (RA ≈ RB = R):
      When the contacts are symmetrically spaced (e.g., square or circular sample):
       R_A = R_B = R

    Substitute R into the theorem:

       exp(-π * R * t / ρ) + exp(-π * R * t / ρ) = 1
       2 * exp(-π * R * t / ρ) = 1
       exp(-π * R * t / ρ) = 1 / 2

    Take the natural logarithm of both sides:

       -π * R * t / ρ = ln(1/2) = -ln(2)

    Cancel negative signs:

       π * R * t / ρ = ln(2)

    Rearrange to solve for bulk resistivity ρ:

       ρ = [ π * t / ln(2) ] * R

    Since π / ln(2) ≈ 4.5323:

       ρ = [ π * t / ln(2) ] * [ (R_A + R_B) / 2 ] * f

    where f is a geometric correction factor that equals 1 when RA = RB.

    Q.4 (c) OR

    Question

    What is Band gap? How can we use UV-VIS spectroscopy for band gap measurement for semiconductors explain in detail.

    Solution

    1. Definition of Band Gap

    The band gap (Eg), or forbidden energy gap, is the difference in energy between the lowest point of the conduction band (conduction band edge, Ec) and the highest point of the valence band (valence band edge, Ev) in a solid material:

    Eg = Ec - Ev

    It represents the minimum energy required to excite a valence electron to become a free charge carrier in the conduction band.

    ---

    2. UV-Vis Spectroscopy Principle

    Ultraviolet-Visible (UV-Vis) absorption spectroscopy measures the fraction of light absorbed by a semiconductor sample as a function of incident photon wavelength λ (typically from 200 nm to 1100 nm).

    • When the incident photon energy hν < Eg, the photons lack sufficient energy to excite electrons across the gap; the material is largely transparent and absorbance is near zero.
    • When hν ≥ Eg, fundamental absorption occurs as electrons transition from the valence band to the conduction band, causing a sharp rise in optical absorption (the absorption edge).
    Absorption Edge and Tauc Plot (schematic, not to scale):
    
     Absorbance (A)                        (α * hν)^(1/n)
          ^
          |       /                             |          /
          |      /                              |         /  Extrapolated
          |     /                               |        /   linear fit
          |    /                                |       / 
          |___/_______> λ                       |______/_____
              λ_edge                                   Eg     --> Photon Energy hν (eV)

    ---

    3. Step-by-Step Procedure to Determine Band Gap Using Tauc's Relation

    1. Data Acquisition:
      Measure optical absorbance A (or transmittance T) as a function of wavelength λ using a UV-Vis spectrophotometer.
    1. Calculate Absorption Coefficient (α):
      Using the Beer-Lambert law, calculate the absorption coefficient α:
       α = (2.303 * A) / d

    where d is the sample thickness.

    1. Calculate Photon Energy (hν):
      Convert the wavelength λ (in nm) to photon energy hν (in eV):
       hν (in eV) = 1240 / λ (in nm)
    1. Apply Tauc's Equation:
      The relationship between the absorption coefficient α and photon energy hν near the band edge is given by Tauc's relation:
       (α * hν) = B * (hν - Eg)^n

    where:

    • B is an energy-independent proportionality constant.
    • Eg is the optical band gap energy.
    • The exponent n depends on the nature of the electronic transition:
    • n = 1/2 for a direct allowed transition (e.g., GaAs, CdTe, ZnO).
    • n = 2 for an indirect allowed transition (e.g., Si, Ge).
    • n = 3/2 for a direct forbidden transition.
    • n = 3 for an indirect forbidden transition.
    1. Construct the Tauc Plot:
    • For a direct band gap semiconductor, plot (α * hν)² on the y-axis versus hν (in eV) on the x-axis.
    • For an indirect band gap semiconductor, plot (α * hν)^(1/2) on the y-axis versus hν on the x-axis.
    1. Extrapolation to Find Eg:
      Identify the linear portion of the curve at the onset of strong absorption. Draw a straight tangent line through this linear region and extrapolate it to intersect the x-axis (where y = 0):
       (α * hν)^(1/n) = 0  ==>  hν = Eg

    The value of photon energy hν at the x-axis intercept yields the experimental optical band gap Eg.

    Q.5 (a)

    Question

    Distinguish between Type-I and Type-II Superconductivity

    Solution

    Comparison between Type-I and Type-II Superconductors

    | Parameter / Feature | Type-I Superconductors (Soft) | Type-II Superconductors (Hard) | | :--- | :--- | :--- | | Critical Fields | Exhibits only one critical magnetic field (Hc). | Exhibits two critical magnetic fields: Lower critical field (Hc1) and Upper critical field (Hc2). | | Meissner Effect | Exhibits a complete Meissner effect; diamagnetism is completely lost above Hc abruptly. | Exhibits complete Meissner effect only up to Hc1. Between Hc1 and Hc2, it enters a vortex / mixed state. | | Critical Field Strength | Critical field Hc is very low (typically < 0.1 Tesla). | Upper critical field Hc2 is very high (often > 10 to 100 Tesla). | | Transition Nature | Abrupt transition from superconducting state to normal state at Hc. | Gradual transition from pure superconducting state to mixed state at Hc1, then to normal state at Hc2. | | Flux Penetration | Magnetic flux does not penetrate the bulk material below Hc. | Magnetic flux lines penetrate the material as quantized flux vortices between Hc1 and Hc2. | | Material Examples | Pure elemental metals such as Lead (Pb), Mercury (Hg), Tin (Sn), Aluminum (Al). | Alloys and complex ceramics such as Nb-Ti, Nb₃Sn, YBa₂Cu₃O₇ (YBCO). | | Applications | Not suitable for high-field electromagnets due to low Hc. | Widely used for strong electromagnets (MRI machines, particle accelerators, Maglev). |

    Q.5 (b)

    Question

    The Fermi level in given material is 2.8 eV. What are the energies for which the probabilities of occupancy at 270K are 0.89,0.20, 0.02 and 0.5

    Solution

    1. Given Information

    • Fermi energy level (Ef) = 2.8 eV
    • Absolute temperature (T) = 270 K
    • Occupancy probabilities f(E) = 0.89, 0.20, 0.02, and 0.50
    • Boltzmann constant (kB) = 8.6173 × 10⁻⁵ eV/K

    2. What is Required

    • Energy values E corresponding to each occupancy probability f(E).

    3. Formula

    The Fermi-Dirac distribution function is:

    f(E) = 1 / [ 1 + exp((E - Ef) / (kB * T)) ]

    Rearranging to express E explicitly:

    1 + exp((E - Ef) / (kB * T)) = 1 / f(E)
    exp((E - Ef) / (kB * T)) = [1 - f(E)] / f(E)
    (E - Ef) / (kB * T) = ln( [1 - f(E)] / f(E) )
    E = Ef + kB * T * ln( [1 - f(E)] / f(E) )

    4. Calculation Steps

    1. Compute thermal energy term (kB * T):
       kB * T = (8.6173 × 10⁻⁵ eV/K) × 270 K = 0.023267 eV
    1. Case 1: For f(E) = 0.50
       [1 - 0.50] / 0.50 = 1.0
       ln(1.0) = 0
       E = 2.8 eV + 0.023267 × 0 = 2.800 eV
    1. Case 2: For f(E) = 0.89
       [1 - 0.89] / 0.89 = 0.11 / 0.89 ≈ 0.123596
       ln(0.123596) = -2.0907
       E = 2.8 eV + (0.023267 eV × (-2.0907))
       E = 2.8 - 0.04864 = 2.751 eV
    1. Case 3: For f(E) = 0.20
       [1 - 0.20] / 0.20 = 0.80 / 0.20 = 4.0
       ln(4.0) = 1.3863
       E = 2.8 eV + (0.023267 eV × 1.3863)
       E = 2.8 + 0.03225 = 2.832 eV
    1. Case 4: For f(E) = 0.02
       [1 - 0.02] / 0.02 = 0.98 / 0.02 = 49.0
       ln(49.0) = 3.8918
       E = 2.8 eV + (0.023267 eV × 3.8918)
       E = 2.8 + 0.09055 = 2.891 eV

    5. Final Answer

    The corresponding energies are:

    • For f(E) = 0.50: E = 2.800 eV
    • For f(E) = 0.89: E = 2.751 eV
    • For f(E) = 0.20: E = 2.832 eV
    • For f(E) = 0.02: E = 2.891 eV

    Q.5 (c)

    Question

    (i) Discuss BCS theory of superconductivity in brief (ii)What is cryotron? Discus

    Solution

    (i) BCS Theory of Superconductivity

    The microscopic theory of superconductivity was proposed by John Bardeen, Leon Cooper, and John Robert Schrieffer in 1957 (known as the BCS Theory).

    Electron-Phonon Interaction (Cooper Pair Formation):
    
      Electron 1 (k↑)              Electron 2 (-k↓)
            ●                           ●
             \                         /
              \       Lattice         /
               \     Distortion      /
                \+---+---+---+---+--/
                 | + | + | + | + |
                  (Virtual Phonon)
    • Electron-Lattice-Electron Interaction: An electron moving through the positive ion lattice attracts nearby positive ions, creating a localized positive charge polarization (lattice deformation / virtual phonon emission).
    • Cooper Pair Formation: A second electron with opposite momentum and opposite spin is attracted to this passing positive distortion before the lattice relaxes. This indirect, phonon-mediated attractive force overcomes the Coulomb repulsion between the two electrons at temperatures below Tc, binding them into a correlated pair known as a Cooper Pair (wave vectors k↑ and -k↓).
    • Bose-Einstein Condensation: While individual electrons are fermions (spin-1/2), a Cooper pair has zero total spin (spin = 0 or 1), behaving as a boson. All Cooper pairs condense into the same macroscopic ground quantum state.
    • Zero Electrical Resistance: The condensed pairs require a finite minimum energy (the superconducting energy gap, 2Δ) to be broken apart. At temperatures below Tc, thermal lattice vibrations cannot break the pairs, allowing them to flow without scattering and resulting in zero electrical resistance.

    ---

    (ii) What is a Cryotron? Discuss

    A cryotron is a switching and memory device that operates at cryogenic temperatures, based on the principle that superconductivity can be destroyed by an applied magnetic field exceeding the critical magnetic field (Hc).

    Schematic Construction of a Wire-wound Cryotron (not to scale):
    
                     Gate Current (Ig)
                     ----------------->
               ===============================
               |   GATE WIRE (Tantalum, Ta)  |
               ===============================
                     | | | | | | | | |
                     | | | | | | | | |  <-- CONTROL COIL (Niobium, Nb)
                     |_|_|_|_|_|_|_|_|
                     ----------------->
                    Control Current (Ic)
    • Construction:
    • Gate Wire: A straight wire made of a superconductor with a lower critical field (e.g., Tantalum, Ta, with Tc ≈ 4.4 K, lower Hc).
    • Control Coil: A single-layer coil wrapped around the gate wire, made of a superconductor with a significantly higher critical field (e.g., Niobium, Nb, with Tc ≈ 9.2 K, higher Hc).
    • The entire device is submerged in liquid helium (T ≈ 4.2 K).
    • Working Mechanism:
    1. ON State (Superconducting / Zero Resistance): When no current flows through the control coil, the gate wire remains superconducting below its critical temperature. Current flows freely through the gate with zero voltage drop.
    2. OFF State (Resistive / Normal State): When a control current Ic is passed through the niobium coil, it establishes a magnetic field. Because the critical field of the gate wire (Ta) is small, this field easily exceeds Hc(gate), switching the gate wire into its normal resistive state. The control coil itself remains superconducting throughout because its critical field Hc(Nb) is much higher.
    • Applications: Used as high-speed cryogenic electronic switches, logical gates, and flip-flops in low-temperature memory circuits.

    Q.5 (a) OR

    Question

    Explain the Fermi’s Golden Rule in brief.

    Solution

    Fermi's Golden Rule

    Fermi's Golden Rule is an essential formula in quantum mechanics derived using time-dependent perturbation theory. It calculates the transition probability per unit time (the transition rate) from an initial stationary state |i⟩ to a continuum of final eigenstates |f⟩ under the influence of a weak, time-harmonic or constant perturbation Hamiltonian H'.

    ---

    Mathematical Expression

    The transition probability per unit time, W_if, is given by:

    W_if = (2 * π / ℏ) * |M_fi|² * ρ(Ef)

    Where:

    • W_if = Transition rate (transitions per second, s⁻¹).
    • ℏ = h / (2 * π) = Reduced Planck's constant.
    • M_fi = ⟨f| H' |i⟩ = Transition matrix element connecting initial state |i⟩ and final state |f⟩ via the perturbation Hamiltonian H'. It reflects the coupling strength between the two states.
    • ρ(Ef) = Density of final quantum states at the transition energy Ef.

    ---

    Physical Significance and Applications

    1. Conservation of Energy: Transitions occur predominantly between states of essentially equal energy (or energy matched to absorbed/emitted photon energy: Ef = Ei ± ℏω).
    2. Dependence on Matrix Element: If |M_fi| = 0, the transition is forbidden by quantum-mechanical selection rules.
    3. Applications: Widely used in solid-state physics to calculate carrier scattering rates (electron-phonon, electron-impurity scattering), optical absorption and emission coefficients in semiconductors, and nuclear decay rates.

    Q.5 (b) OR

    Question

    The critical magnetic field of a given superconductor is 9.5 x 10^3 A/m at 0 K. At what temperature does the critical magnetic field of the sample drop to 5 x 10^3 A/m, given that the critical temperature of the sample is 7.2 K? Also, calculate the critical current density at that temperature if the radius of the wire is 0.4 mm.

    Solution

    1. Given Information

    • Critical magnetic field at 0 K: Hc(0) = 9.5 × 10³ A/m
    • Critical temperature: Tc = 7.2 K
    • Critical magnetic field at temperature T: Hc(T) = 5.0 × 10³ A/m
    • Radius of the superconducting wire: r = 0.4 mm = 0.4 × 10⁻³ m = 4.0 × 10⁻⁴ m

    2. What is Required

    1. Temperature T at which the critical magnetic field is 5.0 × 10³ A/m.
    2. Critical current density Jc at that temperature.

    3. Formulas

    • Temperature Dependence of Critical Magnetic Field:
      Hc(T) = Hc(0) * [ 1 - (T / Tc)² ]
    • Silsbee's Rule (Critical Current for a Cylindrical Wire):
      Ic = 2 * π * r * Hc(T)
    • Critical Current Density (Jc):
      Jc = Ic / A = (2 * π * r * Hc(T)) / (π * r²) = (2 * Hc(T)) / r

    4. Calculation Steps

    Step A: Determine the Temperature T
    1. Substitute values into the critical field formula:
       5.0 × 10³ = 9.5 × 10³ * [ 1 - (T / 7.2)² ]
    1. Divide both sides by 9.5 × 10³:
       1 - (T / 7.2)² = (5.0 × 10³) / (9.5 × 10³) = 5 / 9.5 ≈ 0.52632
    1. Solve for (T / 7.2)²:
       (T / 7.2)² = 1 - 0.52632 = 0.47368
    1. Take the square root:
       T / 7.2 = sqrt(0.47368) ≈ 0.68824
    1. Calculate T:
       T = 7.2 × 0.68824 = 4.955 K ≈ 4.96 K
    Step B: Determine the Critical Current Density Jc
    1. Cross-sectional area of wire A = π * r².
    2. Using the direct formula for Jc:
       Jc = (2 * Hc(T)) / r
    1. Substitute given values:
       Jc = [ 2 × (5.0 × 10³ A/m) ] / (4.0 × 10⁻⁴ m)
       Jc = (1.0 × 10⁴) / (4.0 × 10⁻⁴)
       Jc = 0.25 × 10⁸ A/m² = 2.5 × 10⁷ A/m²

    (For completeness, the total critical current is: Ic = 2 π (4.0 × 10⁻⁴ m) (5.0 × 10³ A/m) = 4 π ≈ 12.57 A

    )

    5. Final Answer

    • The temperature at which the field drops to 5 × 10³ A/m is 4.96 K.
    • The critical current density at this temperature is 2.5 × 10⁷ A/m² (or 25 A/mm²).

    Q.5 (c) OR

    Question

    List various properties of Superconductors and explain them in detail.

    Solution

    Properties of Superconductors

    Superconductivity is a distinct quantum state of matter discovered by Heike Kamerlingh Onnes in 1911. Superconductors exhibit several unique electrical, magnetic, thermal, and structural properties below a critical temperature (Tc).

    ---

    1. Zero Electrical Resistance (Infinite Conductivity)

    • Below the critical transition temperature Tc, the direct current (DC) electrical resistance of a superconductor abruptly drops to absolute zero (R = 0, σ → ∞).
    • An electric current induced in a closed superconducting loop will persist indefinitely without decay as long as the temperature is kept below Tc; such currents are known as persistent currents.

    ---

    2. Meissner Effect (Perfect Diamagnetism)

    • When a superconducting material is cooled below its critical temperature in the presence of an external magnetic field, it completely expels all magnetic flux from its interior.
    • Inside the bulk superconductor, the magnetic induction is zero: B = 0.
    • Since B = μ₀ * (H + M) = 0, it follows that the magnetization is M = -H.
    • The magnetic susceptibility is exactly: χ = M / H = -1.
    • This demonstrates that superconductivity is not merely infinite conductivity, but a distinct thermodynamic state.

    ---

    3. Critical Magnetic Field (Hc)

    • Superconductivity cannot persist in arbitrarily high magnetic fields. If the applied magnetic field exceeds a threshold value known as the critical magnetic field (Hc), the superconducting state is destroyed and the material reverts to its normal state.
    • The critical field follows a parabolic temperature dependence:
      Hc(T) = Hc(0) * [ 1 - (T / Tc)² ]

    where Hc(0) is the critical field at absolute zero (0 K).

    ---

    4. Critical Current and Critical Current Density (Silsbee's Effect)

    • When an electric current flows through a superconductor, it produces its own magnetic field around the surface.
    • According to Silsbee's rule, when this self-induced magnetic field reaches Hc(T), superconductivity is destroyed. The maximum current that can be carried without resistance is the critical current (Ic):
      Ic = 2 * π * r * Hc

    for a round wire of radius r.

    ---

    5. Energy Gap (Eg = 2Δ)

    • The electronic excitation spectrum of a superconductor contains an energy gap Eg = 2Δ centered at the Fermi level.
    • This gap corresponds to the binding energy required to break a Cooper pair into two single quasiparticle electrons. At 0 K, BCS theory predicts:
      Eg(0) = 2 * Δ(0) ≈ 3.52 * kB * Tc

    ---

    6. Isotope Effect

    • For different isotopes of the same superconducting element, the critical temperature Tc varies inversely with the square root of the isotopic mass M:
      Tc * M^α = constant

    where the isotope coefficient α ≈ 0.5 for many simple metals.

    • This experimental discovery confirmed that superconductivity involves interactions between electrons and lattice vibrations (phonons).

    ---

    7. Discontinuity in Specific Heat

    • At the critical transition temperature Tc in zero magnetic field, the electronic specific heat exhibits a sharp, finite jump (discontinuity) without any latent heat, characteristic of a second-order thermodynamic phase transition.
    • Below Tc, the electronic specific heat decreases exponentially with temperature (Ce ∝ exp(-Δ / (kB * T))), confirming the presence of the energy gap.

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